[mirror_edk2.git] / ArmPkg / Drivers / ArmGic / GicV2 / ArmGicV2NonSecLib.c

/** @file\r
*\r
*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
*\r
*  SPDX-License-Identifier: BSD-2-Clause-Patent\r
*\r
**/\r
\r
#include <Uefi.h>\r
#include <Library/IoLib.h>\r
#include <Library/ArmGicLib.h>\r
\r
\r
VOID\r
EFIAPI\r
ArmGicV2EnableInterruptInterface (\r
  IN  INTN          GicInterruptInterfaceBase\r
  )\r
{\r
  /*\r
  * Enable the CPU interface in Non-Secure world\r
  * Note: The ICCICR register is banked when Security extensions are implemented\r
  */\r
  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);\r
}\r
\r
VOID\r
EFIAPI\r
ArmGicV2DisableInterruptInterface (\r
  IN  INTN          GicInterruptInterfaceBase\r
  )\r
{\r
  // Disable Gic Interface\r
  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);\r
  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);\r
}\r
Commit	Line	Data
793ca69f OM	1	/** @file\r
	2	*\r
	3	* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
	4	*\r
4059386c	5	* SPDX-License-Identifier: BSD-2-Clause-Patent\r
793ca69f OM	6	*\r
	7	**/\r
	8	\r
	9	#include <Uefi.h>\r
	10	#include <Library/IoLib.h>\r
	11	#include <Library/ArmGicLib.h>\r
	12	\r
	13	\r
	14	VOID\r
	15	EFIAPI\r
	16	ArmGicV2EnableInterruptInterface (\r
	17	IN INTN GicInterruptInterfaceBase\r
	18	)\r
	19	{\r
	20	/*\r
	21	* Enable the CPU interface in Non-Secure world\r
	22	* Note: The ICCICR register is banked when Security extensions are implemented\r
	23	*/\r
	24	MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);\r
	25	}\r
	26	\r
	27	VOID\r
	28	EFIAPI\r
	29	ArmGicV2DisableInterruptInterface (\r
	30	IN INTN GicInterruptInterfaceBase\r
	31	)\r
	32	{\r
	33	// Disable Gic Interface\r
	34	MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);\r
	35	MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);\r
	36	}\r