Omap35xxPkg: drop CpuExceptionHandlerLib library class resolution

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Exception.c

/** @file\r
\r
  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
  Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "CpuDxe.h"\r
\r
#include <Chipset/AArch64.h>\r
\r
VOID\r
ExceptionHandlersStart (\r
  VOID\r
  );\r
\r
VOID\r
ExceptionHandlersEnd (\r
  VOID\r
  );\r
\r
VOID\r
CommonExceptionEntry (\r
  VOID\r
  );\r
\r
VOID\r
AsmCommonExceptionEntry (\r
  VOID\r
  );\r
\r
\r
EFI_EXCEPTION_CALLBACK  gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1];\r
EFI_EXCEPTION_CALLBACK  gDebuggerExceptionHandlers[MAX_AARCH64_EXCEPTION + 1];\r
\r
\r
\r
/**\r
  This function registers and enables the handler specified by InterruptHandler for a processor\r
  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the\r
  handler for the processor interrupt or exception type specified by InterruptType is uninstalled.\r
  The installed handler is called once for each processor interrupt or exception.\r
\r
  @param  InterruptType    A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r
                           are enabled and FALSE if interrupts are disabled.\r
  @param  InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
                           when a processor interrupt occurs. If this parameter is NULL, then the handler\r
                           will be uninstalled.\r
\r
  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.\r
  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was\r
                                previously installed.\r
  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r
                                previously installed.\r
  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported.\r
\r
**/\r
EFI_STATUS\r
RegisterInterruptHandler (\r
  IN EFI_EXCEPTION_TYPE             InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER      InterruptHandler\r
  )\r
{\r
  if (InterruptType > MAX_AARCH64_EXCEPTION) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {\r
    return EFI_ALREADY_STARTED;\r
  }\r
\r
  gExceptionHandlers[InterruptType] = InterruptHandler;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
\r
\r
VOID\r
EFIAPI\r
CommonCExceptionHandler (\r
  IN     EFI_EXCEPTION_TYPE           ExceptionType,\r
  IN OUT EFI_SYSTEM_CONTEXT           SystemContext\r
  )\r
{\r
  if (ExceptionType <= MAX_AARCH64_EXCEPTION) {\r
    if (gExceptionHandlers[ExceptionType]) {\r
      gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);\r
      return;\r
    }\r
  } else {\r
    DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %016lx\n", ExceptionType, SystemContext.SystemContextAArch64->ELR));\r
    ASSERT (FALSE);\r
  }\r
\r
  DefaultExceptionHandler (ExceptionType, SystemContext);\r
}\r
\r
\r
\r
EFI_STATUS\r
InitializeExceptions (\r
  IN EFI_CPU_ARCH_PROTOCOL    *Cpu\r
  )\r
{\r
  EFI_STATUS           Status;\r
  BOOLEAN              IrqEnabled;\r
  BOOLEAN              FiqEnabled;\r
\r
  Status = EFI_SUCCESS;\r
  ZeroMem (gExceptionHandlers,sizeof(*gExceptionHandlers));\r
\r
  //\r
  // Disable interrupts\r
  //\r
  Cpu->GetInterruptState (Cpu, &IrqEnabled);\r
  Cpu->DisableInterrupt (Cpu);\r
\r
  //\r
  // EFI does not use the FIQ, but a debugger might so we must disable\r
  // as we take over the exception vectors.\r
  //\r
  FiqEnabled = ArmGetFiqState ();\r
  ArmDisableFiq ();\r
\r
  // The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure 'Align=4K'\r
  // is defined into your FDF for this module.\r
  ASSERT (((UINTN)ExceptionHandlersStart & ARM_VECTOR_TABLE_ALIGNMENT) == 0);\r
\r
  // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector\r
  // Base Address to point into CpuDxe code.\r
  ArmWriteVBar ((UINTN)ExceptionHandlersStart);\r
\r
  if (FiqEnabled) {\r
    ArmEnableFiq ();\r
  }\r
\r
  if (IrqEnabled) {\r
    //\r
    // Restore interrupt state\r
    //\r
    Status = Cpu->EnableInterrupt (Cpu);\r
  }\r
\r
  return Status;\r
}\r