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1/** @file\r
2\r
d6ebcab7 3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
2ef2b01e 4 \r
d6ebcab7 5 This program and the accompanying materials\r
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6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuDxe.h" \r
f659880b 16\r
1bfda055 17//FIXME: Will not compile on non-ARMv7 builds\r
18#include <Chipset/ArmV7.h>\r
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19\r
20VOID\r
21ExceptionHandlersStart (\r
22 VOID\r
23 );\r
24\r
25VOID\r
26ExceptionHandlersEnd (\r
27 VOID\r
28 );\r
29\r
30VOID\r
31CommonExceptionEntry (\r
32 VOID\r
33 );\r
34\r
35VOID\r
36AsmCommonExceptionEntry (\r
37 VOID\r
38 );\r
39\r
40\r
41EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1];\r
42EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1];\r
43\r
44\r
45\r
46/**\r
47 This function registers and enables the handler specified by InterruptHandler for a processor \r
48 interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
49 handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
50 The installed handler is called once for each processor interrupt or exception.\r
51\r
52 @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r
53 are enabled and FALSE if interrupts are disabled.\r
54 @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
55 when a processor interrupt occurs. If this parameter is NULL, then the handler\r
56 will be uninstalled.\r
57\r
58 @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.\r
59 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was\r
60 previously installed.\r
61 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r
62 previously installed.\r
63 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.\r
64\r
65**/\r
66EFI_STATUS\r
67RegisterInterruptHandler (\r
68 IN EFI_EXCEPTION_TYPE InterruptType,\r
69 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
70 )\r
71{\r
72 if (InterruptType > MAX_ARM_EXCEPTION) {\r
73 return EFI_UNSUPPORTED;\r
74 }\r
75\r
76 if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {\r
77 return EFI_ALREADY_STARTED;\r
78 }\r
79\r
80 gExceptionHandlers[InterruptType] = InterruptHandler;\r
81\r
82 return EFI_SUCCESS;\r
83}\r
84\r
85\r
f659880b 86\r
f659880b 87\r
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88VOID\r
89EFIAPI\r
90CommonCExceptionHandler (\r
91 IN EFI_EXCEPTION_TYPE ExceptionType,\r
92 IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
93 )\r
94{\r
2ef2b01e 95 if (ExceptionType <= MAX_ARM_EXCEPTION) {\r
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96 if (gExceptionHandlers[ExceptionType]) {\r
97 gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);\r
9f50cb97 98 return;\r
2ef2b01e 99 }\r
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100 } else {\r
101 DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %08x\n", ExceptionType, SystemContext.SystemContextArm->PC));\r
102 ASSERT (FALSE);\r
2ef2b01e 103 }\r
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104 \r
105 if (ExceptionType == EXCEPT_ARM_SOFTWARE_INTERRUPT) {\r
106 //\r
107 // ARM JTAG debuggers some times use this vector, so it is not an error to get one\r
108 //\r
109 return;\r
110 }\r
111\r
6f72e28d 112 DefaultExceptionHandler (ExceptionType, SystemContext);\r
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113}\r
114\r
115\r
116\r
117EFI_STATUS\r
118InitializeExceptions (\r
119 IN EFI_CPU_ARCH_PROTOCOL *Cpu\r
120 )\r
121{\r
122 EFI_STATUS Status;\r
123 UINTN Offset;\r
124 UINTN Length;\r
125 UINTN Index;\r
0416278c 126 BOOLEAN IrqEnabled;\r
127 BOOLEAN FiqEnabled;\r
2ef2b01e 128 EFI_PHYSICAL_ADDRESS Base;\r
41d47802 129 UINT32 *VectorBase;\r
2ef2b01e 130\r
1bfda055 131 Status = EFI_SUCCESS;\r
6e882393 132 ZeroMem (gExceptionHandlers,sizeof(*gExceptionHandlers));\r
133\r
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134 //\r
135 // Disable interrupts\r
136 //\r
0416278c 137 Cpu->GetInterruptState (Cpu, &IrqEnabled);\r
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138 Cpu->DisableInterrupt (Cpu);\r
139\r
0416278c 140 //\r
141 // EFI does not use the FIQ, but a debugger might so we must disable \r
142 // as we take over the exception vectors. \r
143 //\r
144 FiqEnabled = ArmGetFiqState ();\r
145 ArmDisableFiq ();\r
146\r
1bfda055 147 if (FeaturePcdGet(PcdRelocateVectorTable) == TRUE) {\r
63adfb11 148 //\r
149 // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
150 //\r
151 Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;\r
152\r
f0fef790 153 // Check if the exception vector is in the low address\r
154 if (PcdGet32 (PcdCpuVectorBaseAddress) == 0x0) {\r
155 // Set SCTLR.V to 0 to enable VBAR to be used\r
156 ArmSetLowVectors ();\r
157 } else {\r
158 ArmSetHighVectors ();\r
159 }\r
160\r
63adfb11 161 //\r
162 // Reserve space for the exception handlers\r
163 //\r
164 Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);\r
165 VectorBase = (UINT32 *)(UINTN)Base;\r
166 Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);\r
167 // If the request was for memory that's not in the memory map (which is often the case for 0x00000000\r
168 // on embedded systems, for example, we don't want to hang up. So we'll check here for a status of\r
169 // EFI_NOT_FOUND, and continue in that case.\r
170 if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {\r
171 ASSERT_EFI_ERROR (Status);\r
172 }\r
173\r
eeec69c5 174 if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {\r
1bfda055 175 // Save existing vector table, in case debugger is already hooked in\r
176 CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (gDebuggerExceptionHandlers));\r
eeec69c5 177 }\r
63adfb11 178\r
179 // Copy our assembly code into the page that contains the exception vectors.\r
180 CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);\r
181\r
182 //\r
183 // Patch in the common Assembly exception handler\r
184 //\r
185 Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;\r
186 *(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;\r
187\r
188 //\r
189 // Initialize the C entry points for interrupts\r
190 //\r
191 for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {\r
eeec69c5 192 if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||\r
193 (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)(UINTN)0xEAFFFFFE)) {\r
63adfb11 194 // Exception handler contains branch to vector location (jmp $) so no handler\r
195 // NOTE: This code assumes vectors are ARM and not Thumb code\r
196 Status = RegisterInterruptHandler (Index, NULL);\r
197 ASSERT_EFI_ERROR (Status);\r
198 } else {\r
199 // If the debugger has already hooked put its vector back\r
200 VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];\r
1bfda055 201 }\r
63adfb11 202 }\r
203\r
204 // Flush Caches since we updated executable stuff\r
205 InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
1bfda055 206\r
63adfb11 207 //Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.\r
208 // The Vector Base Address Register defines the location\r
1c1e70fa 209 ArmWriteVBar (PcdGet32(PcdCpuVectorBaseAddress));\r
1bfda055 210 } else {\r
1c1e70fa 211 // The Vector table must be 32-byte aligned\r
212 ASSERT(((UINT32)ExceptionHandlersStart & ((1 << 5)-1)) == 0);\r
213\r
1bfda055 214 // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.\r
1c1e70fa 215 ArmWriteVBar ((UINT32)ExceptionHandlersStart);\r
9f50cb97 216 }\r
217\r
0416278c 218 if (FiqEnabled) {\r
219 ArmEnableFiq ();\r
220 }\r
221\r
222 if (IrqEnabled) {\r
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223 // \r
224 // Restore interrupt state\r
225 //\r
226 Status = Cpu->EnableInterrupt (Cpu);\r
227 }\r
228\r
229 return Status;\r
230}\r