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ArmPkg/CpuDxe: Change chain of dependency for CpuDxe and PL390Gic
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1/** @file\r
2\r
d6ebcab7 3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
2ef2b01e 4 \r
d6ebcab7 5 This program and the accompanying materials\r
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6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuDxe.h" \r
f659880b 16\r
1bfda055 17//FIXME: Will not compile on non-ARMv7 builds\r
18#include <Chipset/ArmV7.h>\r
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19\r
20VOID\r
21ExceptionHandlersStart (\r
22 VOID\r
23 );\r
24\r
25VOID\r
26ExceptionHandlersEnd (\r
27 VOID\r
28 );\r
29\r
30VOID\r
31CommonExceptionEntry (\r
32 VOID\r
33 );\r
34\r
35VOID\r
36AsmCommonExceptionEntry (\r
37 VOID\r
38 );\r
39\r
40\r
41EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1];\r
42EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1];\r
43\r
44\r
45\r
46/**\r
47 This function registers and enables the handler specified by InterruptHandler for a processor \r
48 interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
49 handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
50 The installed handler is called once for each processor interrupt or exception.\r
51\r
52 @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r
53 are enabled and FALSE if interrupts are disabled.\r
54 @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
55 when a processor interrupt occurs. If this parameter is NULL, then the handler\r
56 will be uninstalled.\r
57\r
58 @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.\r
59 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was\r
60 previously installed.\r
61 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r
62 previously installed.\r
63 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.\r
64\r
65**/\r
66EFI_STATUS\r
67RegisterInterruptHandler (\r
68 IN EFI_EXCEPTION_TYPE InterruptType,\r
69 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
70 )\r
71{\r
72 if (InterruptType > MAX_ARM_EXCEPTION) {\r
73 return EFI_UNSUPPORTED;\r
74 }\r
75\r
76 if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {\r
77 return EFI_ALREADY_STARTED;\r
78 }\r
79\r
80 gExceptionHandlers[InterruptType] = InterruptHandler;\r
81\r
82 return EFI_SUCCESS;\r
83}\r
84\r
85\r
f659880b 86\r
f659880b 87\r
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88VOID\r
89EFIAPI\r
90CommonCExceptionHandler (\r
91 IN EFI_EXCEPTION_TYPE ExceptionType,\r
92 IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
93 )\r
94{\r
2ef2b01e 95 if (ExceptionType <= MAX_ARM_EXCEPTION) {\r
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96 if (gExceptionHandlers[ExceptionType]) {\r
97 gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);\r
9f50cb97 98 return;\r
2ef2b01e 99 }\r
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100 } else {\r
101 DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %08x\n", ExceptionType, SystemContext.SystemContextArm->PC));\r
102 ASSERT (FALSE);\r
2ef2b01e 103 }\r
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104 \r
105 if (ExceptionType == EXCEPT_ARM_SOFTWARE_INTERRUPT) {\r
106 //\r
107 // ARM JTAG debuggers some times use this vector, so it is not an error to get one\r
108 //\r
109 return;\r
110 }\r
111\r
6f72e28d 112 DefaultExceptionHandler (ExceptionType, SystemContext);\r
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113}\r
114\r
115\r
116\r
117EFI_STATUS\r
118InitializeExceptions (\r
119 IN EFI_CPU_ARCH_PROTOCOL *Cpu\r
120 )\r
121{\r
122 EFI_STATUS Status;\r
123 UINTN Offset;\r
124 UINTN Length;\r
125 UINTN Index;\r
0416278c 126 BOOLEAN IrqEnabled;\r
127 BOOLEAN FiqEnabled;\r
2ef2b01e 128 EFI_PHYSICAL_ADDRESS Base;\r
41d47802 129 UINT32 *VectorBase;\r
2ef2b01e 130\r
1bfda055 131 Status = EFI_SUCCESS;\r
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132 //\r
133 // Disable interrupts\r
134 //\r
0416278c 135 Cpu->GetInterruptState (Cpu, &IrqEnabled);\r
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136 Cpu->DisableInterrupt (Cpu);\r
137\r
0416278c 138 //\r
139 // EFI does not use the FIQ, but a debugger might so we must disable \r
140 // as we take over the exception vectors. \r
141 //\r
142 FiqEnabled = ArmGetFiqState ();\r
143 ArmDisableFiq ();\r
144\r
1bfda055 145 if (FeaturePcdGet(PcdRelocateVectorTable) == TRUE) {\r
63adfb11 146 //\r
147 // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
148 //\r
149 Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;\r
150\r
f0fef790 151 // Check if the exception vector is in the low address\r
152 if (PcdGet32 (PcdCpuVectorBaseAddress) == 0x0) {\r
153 // Set SCTLR.V to 0 to enable VBAR to be used\r
154 ArmSetLowVectors ();\r
155 } else {\r
156 ArmSetHighVectors ();\r
157 }\r
158\r
63adfb11 159 //\r
160 // Reserve space for the exception handlers\r
161 //\r
162 Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);\r
163 VectorBase = (UINT32 *)(UINTN)Base;\r
164 Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);\r
165 // If the request was for memory that's not in the memory map (which is often the case for 0x00000000\r
166 // on embedded systems, for example, we don't want to hang up. So we'll check here for a status of\r
167 // EFI_NOT_FOUND, and continue in that case.\r
168 if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {\r
169 ASSERT_EFI_ERROR (Status);\r
170 }\r
171\r
eeec69c5 172 if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {\r
1bfda055 173 // Save existing vector table, in case debugger is already hooked in\r
174 CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (gDebuggerExceptionHandlers));\r
eeec69c5 175 }\r
63adfb11 176\r
177 // Copy our assembly code into the page that contains the exception vectors.\r
178 CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);\r
179\r
180 //\r
181 // Patch in the common Assembly exception handler\r
182 //\r
183 Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;\r
184 *(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;\r
185\r
186 //\r
187 // Initialize the C entry points for interrupts\r
188 //\r
189 for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {\r
eeec69c5 190 if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||\r
191 (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)(UINTN)0xEAFFFFFE)) {\r
63adfb11 192 // Exception handler contains branch to vector location (jmp $) so no handler\r
193 // NOTE: This code assumes vectors are ARM and not Thumb code\r
194 Status = RegisterInterruptHandler (Index, NULL);\r
195 ASSERT_EFI_ERROR (Status);\r
196 } else {\r
197 // If the debugger has already hooked put its vector back\r
198 VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];\r
1bfda055 199 }\r
63adfb11 200 }\r
201\r
202 // Flush Caches since we updated executable stuff\r
203 InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
1bfda055 204\r
63adfb11 205 //Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.\r
206 // The Vector Base Address Register defines the location\r
207 ArmWriteVBar(PcdGet32(PcdCpuVectorBaseAddress));\r
1bfda055 208 } else {\r
209 // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.\r
210 ArmWriteVBar((UINT32)ExceptionHandlersStart);\r
9f50cb97 211 }\r
212\r
0416278c 213 if (FiqEnabled) {\r
214 ArmEnableFiq ();\r
215 }\r
216\r
217 if (IrqEnabled) {\r
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218 // \r
219 // Restore interrupt state\r
220 //\r
221 Status = Cpu->EnableInterrupt (Cpu);\r
222 }\r
223\r
224 return Status;\r
225}\r