projects / mirror_edk2.git / blame
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|---|---|---|
| 25402f5d HL |
1 | /** @file\r |
| 2 | Macros to work around lack of Apple support for LDR register, =expr\r | |
| 3 | \r | |
| 4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
| 5 | Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r | |
| 6 | \r | |
| 7 | This program and the accompanying materials\r | |
| 8 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 9 | which accompanies this distribution. The full text of the license may be found at\r | |
| 10 | http://opensource.org/licenses/bsd-license.php\r | |
| 11 | \r | |
| 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 14 | \r | |
| 15 | **/\r | |
| 16 | \r | |
| 17 | \r | |
| 18 | #ifndef __MACRO_IO_LIBV8_H__\r | |
| 19 | #define __MACRO_IO_LIBV8_H__\r | |
| 20 | \r | |
| 21 | #if defined (__GNUC__)\r | |
| 22 | \r | |
| 23 | #define MmioWrite32(Address, Data) \\r | |
| 24 | ldr x1, =Address ; \\r | |
| 25 | ldr x0, =Data ; \\r | |
| 26 | str x0, [x1]\r | |
| 27 | \r | |
| 28 | #define MmioOr32(Address, OrData) \\r | |
| 29 | ldr x1, =Address ; \\r | |
| 30 | ldr x2, =OrData ; \\r | |
| 31 | ldr x0, [x1] ; \\r | |
| 32 | orr x0, x0, x2 ; \\r | |
| 33 | str x0, [x1]\r | |
| 34 | \r | |
| 35 | #define MmioAnd32(Address, AndData) \\r | |
| 36 | ldr x1, =Address ; \\r | |
| 37 | ldr x2, =AndData ; \\r | |
| 38 | ldr x0, [x1] ; \\r | |
| 39 | and x0, x0, x2 ; \\r | |
| 40 | str x0, [x1]\r | |
| 41 | \r | |
| 42 | #define MmioAndThenOr32(Address, AndData, OrData) \\r | |
| 43 | ldr x1, =Address ; \\r | |
| 44 | ldr x0, [x1] ; \\r | |
| 45 | ldr x2, =AndData ; \\r | |
| 46 | and x0, x0, x2 ; \\r | |
| 47 | ldr x2, =OrData ; \\r | |
| 48 | orr x0, x0, x2 ; \\r | |
| 49 | str x0, [x1]\r | |
| 50 | \r | |
| 51 | #define MmioWriteFromReg32(Address, Reg) \\r | |
| 52 | ldr x1, =Address ; \\r | |
| 53 | str Reg, [x1]\r | |
| 54 | \r | |
| 55 | #define MmioRead32(Address) \\r | |
| 56 | ldr x1, =Address ; \\r | |
| 57 | ldr x0, [x1]\r | |
| 58 | \r | |
| 59 | #define MmioReadToReg32(Address, Reg) \\r | |
| 60 | ldr x1, =Address ; \\r | |
| 61 | ldr Reg, [x1]\r | |
| 62 | \r | |
| 63 | #define LoadConstant(Data) \\r | |
| 64 | ldr x0, =Data\r | |
| 65 | \r | |
| 66 | #define LoadConstantToReg(Data, Reg) \\r | |
| 67 | ldr Reg, =Data\r | |
| 68 | \r | |
| 69 | #define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1) \\r | |
| 70 | ands Tmp, GlobalSize, #15 ; \\r | |
| 71 | mov Tmp1, #16 ; \\r | |
| 72 | sub Tmp1, Tmp1, Tmp ; \\r | |
| 73 | csel Tmp, Tmp1, Tmp, ne ; \\r | |
| 74 | add GlobalSize, GlobalSize, Tmp ; \\r | |
| 75 | sub sp, StackTop, GlobalSize ; \\r | |
| 76 | ; \\r | |
| 77 | mov Tmp, sp ; \\r | |
| 78 | mov GlobalSize, #0x0 ; \\r | |
| 79 | _SetPrimaryStackInitGlobals: ; \\r | |
| 80 | cmp Tmp, StackTop ; \\r | |
| 81 | b.eq _SetPrimaryStackEnd ; \\r | |
| 82 | str GlobalSize, [Tmp], #8 ; \\r | |
| 83 | b _SetPrimaryStackInitGlobals ; \\r | |
| 84 | _SetPrimaryStackEnd:\r | |
| 85 | \r | |
| 86 | // Initialize the Global Variable with '0'\r | |
| 87 | #define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \\r | |
| 88 | and Tmp1, GlobalSize, #15 ; \\r | |
| 89 | mov Tmp2, #16 ; \\r | |
| 90 | sub Tmp2, Tmp2, Tmp1 ; \\r | |
| 91 | add GlobalSize, GlobalSize, Tmp2 ; \\r | |
| 92 | ; \\r | |
| 93 | mov Tmp1, sp ; \\r | |
| 94 | sub sp, sp, GlobalSize ; \\r | |
| 95 | mov GlobalSize, #0x0 ; \\r | |
| 96 | _InitializePrimaryStackLoop: ; \\r | |
| 97 | mov Tmp2, sp ; \\r | |
| 98 | cmp Tmp1, Tmp2 ; \\r | |
| 99 | bls _InitializePrimaryStackEnd ; \\r | |
| 100 | str GlobalSize, [Tmp1, #-8]! ; \\r | |
| 101 | b _InitializePrimaryStackLoop ; \\r | |
| 102 | _InitializePrimaryStackEnd:\r | |
| 103 | \r | |
| 104 | // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r | |
| 105 | // This only selects between EL1 and EL2, else we die.\r | |
| 106 | // Provide the Macro with a safe temp xreg to use.\r | |
| 107 | #define EL1_OR_EL2(SAFE_XREG) \\r | |
| 108 | mrs SAFE_XREG, CurrentEL ;\\r | |
| 109 | cmp SAFE_XREG, #0x4 ;\\r | |
| 110 | b.eq 1f ;\\r | |
| 111 | cmp SAFE_XREG, #0x8 ;\\r | |
| 112 | b.eq 2f ;\\r | |
| 113 | b dead ;// We should never get here.\r | |
| 114 | \r | |
| 115 | // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r | |
| 116 | // This only selects between EL1 and EL2 and EL3, else we die.\r | |
| 117 | // Provide the Macro with a safe temp xreg to use.\r | |
| 118 | #define EL1_OR_EL2_OR_EL3(SAFE_XREG) \\r | |
| 119 | mrs SAFE_XREG, CurrentEL ;\\r | |
| 120 | cmp SAFE_XREG, #0x4 ;\\r | |
| 121 | b.eq 1f ;\\r | |
| 122 | cmp SAFE_XREG, #0x8 ;\\r | |
| 123 | b.eq 2f ;\\r | |
| 124 | cmp SAFE_XREG, #0xC ;\\r | |
| 125 | b.eq 3f ;\\r | |
| 126 | b dead ;// We should never get here.\r | |
| 127 | \r | |
| 128 | #else\r | |
| 129 | \r | |
| 130 | //\r | |
| 131 | // Use ARM assembly macros, form armasm\r | |
| 132 | //\r | |
| 133 | // Less magic in the macros if ldr reg, =expr works\r | |
| 134 | //\r | |
| 135 | \r | |
| 136 | // returns _Data in X0 and _Address in X1\r | |
| 137 | \r | |
| 138 | \r | |
| 139 | \r | |
| 140 | #define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data\r | |
| 141 | \r | |
| 142 | \r | |
| 143 | \r | |
| 144 | \r | |
| 145 | // returns Data in X0 and Address in X1, and OrData in X2\r | |
| 146 | #define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData\r | |
| 147 | \r | |
| 148 | \r | |
| 149 | // returns _Data in X0 and _Address in X1, and _OrData in X2\r | |
| 150 | \r | |
| 151 | \r | |
| 152 | #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData\r | |
| 153 | \r | |
| 154 | // returns result in X0, _Address in X1, and _OrData in X2\r | |
| 155 | \r | |
| 156 | \r | |
| 157 | #define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData\r | |
| 158 | \r | |
| 159 | \r | |
| 160 | // returns _Data in _Reg and _Address in X1\r | |
| 161 | \r | |
| 162 | \r | |
| 163 | #define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg\r | |
| 164 | \r | |
| 165 | // returns _Data in X0 and _Address in X1\r | |
| 166 | \r | |
| 167 | \r | |
| 168 | #define MmioRead32(Address) MmioRead32Macro Address\r | |
| 169 | \r | |
| 170 | // returns _Data in Reg and _Address in X1\r | |
| 171 | \r | |
| 172 | \r | |
| 173 | #define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg\r | |
| 174 | \r | |
| 175 | \r | |
| 176 | // load X0 with _Data\r | |
| 177 | \r | |
| 178 | \r | |
| 179 | #define LoadConstant(Data) LoadConstantMacro Data\r | |
| 180 | \r | |
| 181 | // load _Reg with _Data\r | |
| 182 | \r | |
| 183 | \r | |
| 184 | #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg\r | |
| 185 | \r | |
| 186 | // conditional load testing eq flag\r | |
| 187 | #define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg\r | |
| 188 | \r | |
| 189 | #define SetPrimaryStack(StackTop,GlobalSize,Tmp, Tmp1) SetPrimaryStack StackTop, GlobalSize, Tmp, Tmp1\r | |
| 190 | \r | |
| 191 | #define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) InitializePrimaryStack GlobalSize, Tmp1, Tmp2\r | |
| 192 | \r | |
| 193 | #define EL1_OR_EL2(SAFE_XREG) EL1_OR_EL2 SAFE_XREG\r | |
| 194 | \r | |
| 195 | #define EL1_OR_EL2_OR_EL3(SAFE_XREG) EL1_OR_EL2_OR_EL3 SAFE_XREG\r | |
| 196 | \r | |
| 197 | #endif\r | |
| 198 | \r | |
| 199 | #endif // __MACRO_IO_LIBV8_H__\r | |
| 200 | \r |