projects / mirror_edk2.git / blame
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| 2ef2b01e A |
1 | /** @file\r |
| 2 | \r | |
| d6ebcab7 | 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 2ef2b01e | 4 | \r |
| d6ebcab7 | 5 | This program and the accompanying materials\r |
| 2ef2b01e A |
6 | are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | **/\r | |
| 14 | \r | |
| 5dea9bd6 | 15 | #ifndef __ARM_V7_H__\r |
| 16 | #define __ARM_V7_H__\r | |
| 2ef2b01e A |
17 | \r |
| 18 | // Domain Access Control Register\r | |
| 19 | #define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))\r | |
| 20 | #define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))\r | |
| 21 | #define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))\r | |
| 22 | #define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))\r | |
| 23 | #define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))\r | |
| 24 | \r | |
| 1bfda055 | 25 | #define TTBR_NOT_OUTER_SHAREABLE BIT5\r |
| 26 | #define TTBR_RGN_OUTER_NON_CACHEABLE 0\r | |
| 27 | #define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3\r | |
| 28 | #define TTBR_RGN_OUTER_WRITE_THROUGH BIT4\r | |
| 29 | #define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)\r | |
| 30 | #define TTBR_SHAREABLE BIT1\r | |
| 31 | #define TTBR_NON_SHAREABLE 0\r | |
| 32 | #define TTBR_INNER_CACHEABLE BIT0\r | |
| 33 | #define TTBR_NON_INNER_CACHEABLE BIT0\r | |
| 34 | #define TTBR_RGN_INNER_NON_CACHEABLE 0\r | |
| 35 | #define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6\r | |
| 36 | #define TTBR_RGN_INNER_WRITE_THROUGH BIT0\r | |
| 37 | #define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)\r | |
| 38 | \r | |
| 39 | #define TTBR_WRITE_THROUGH_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC )\r | |
| 40 | #define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC )\r | |
| 41 | #define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )\r | |
| 42 | #define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC )\r | |
| 43 | \r | |
| 44 | \r | |
| 45 | #define TRANSLATION_TABLE_SECTION_COUNT 4096\r | |
| 46 | #define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)\r | |
| 47 | #define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)\r | |
| 48 | #define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)\r | |
| 49 | \r | |
| 50 | #define TRANSLATION_TABLE_PAGE_COUNT 256\r | |
| 51 | #define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)\r | |
| 52 | #define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)\r | |
| 53 | #define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)\r | |
| 2ef2b01e A |
54 | \r |
| 55 | #define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))\r | |
| 56 | \r | |
| 57 | // Translation table descriptor types\r | |
| 1bfda055 | 58 | #define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))\r |
| 59 | #define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)\r | |
| 60 | #define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)\r | |
| 61 | #define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))\r | |
| 62 | #define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))\r | |
| 63 | #define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)\r | |
| 64 | \r | |
| 65 | // Translation table descriptor types\r | |
| 66 | #define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0)\r | |
| 67 | #define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0)\r | |
| 68 | #define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0)\r | |
| 69 | #define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0)\r | |
| 70 | #define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0)\r | |
| 2ef2b01e A |
71 | \r |
| 72 | // Section descriptor definitions\r | |
| 73 | #define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)\r | |
| 74 | \r | |
| 75 | #define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)\r | |
| 76 | #define TT_DESCRIPTOR_SECTION_NS_SECURE (0UL << 19)\r | |
| 77 | #define TT_DESCRIPTOR_SECTION_NS_NON_SECURE (1UL << 19)\r | |
| 78 | \r | |
| 79 | #define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)\r | |
| 80 | #define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)\r | |
| 81 | #define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)\r | |
| 82 | \r | |
| 1bfda055 | 83 | #define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)\r |
| 84 | #define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)\r | |
| 85 | #define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)\r | |
| 86 | \r | |
| 2ef2b01e A |
87 | #define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)\r |
| 88 | #define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)\r | |
| 89 | #define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)\r | |
| 90 | \r | |
| 1bfda055 | 91 | #define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)\r |
| 92 | #define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)\r | |
| 93 | #define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)\r | |
| 94 | \r | |
| 2ef2b01e A |
95 | #define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10))\r |
| 96 | #define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10))\r | |
| 97 | #define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10))\r | |
| 98 | #define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10))\r | |
| 99 | #define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10))\r | |
| 100 | #define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10))\r | |
| 101 | #define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10))\r | |
| 102 | \r | |
| 1bfda055 | 103 | #define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4))\r |
| 104 | #define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4))\r | |
| 105 | #define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4))\r | |
| 106 | #define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4))\r | |
| 107 | #define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4))\r | |
| 108 | #define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4))\r | |
| 109 | #define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4))\r | |
| 110 | \r | |
| 111 | #define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)\r | |
| 112 | #define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)\r | |
| 113 | #define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15)\r | |
| 114 | \r | |
| 115 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))\r | |
| 116 | #define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)\r | |
| 2ef2b01e A |
117 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))\r |
| 118 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))\r | |
| 119 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))\r | |
| 120 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))\r | |
| 121 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 122 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))\r | |
| 123 | #define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 124 | \r | |
| 1bfda055 | 125 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))\r |
| 126 | #define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3)\r | |
| 127 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))\r | |
| 128 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))\r | |
| 129 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))\r | |
| 130 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))\r | |
| 131 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))\r | |
| 132 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))\r | |
| 133 | #define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))\r | |
| 134 | \r | |
| 135 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 136 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 137 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))\r | |
| 138 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))\r | |
| 139 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))\r | |
| 140 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 141 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))\r | |
| 142 | #define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))\r | |
| 143 | \r | |
| 144 | #define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)\r | |
| 145 | #define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)\r | |
| 146 | #define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)\r | |
| 147 | #define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \\r | |
| 148 | ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \\r | |
| 149 | ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_PAGE_XN_MASK))\r | |
| 150 | #define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \\r | |
| 151 | (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \\r | |
| 152 | (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))\r | |
| 153 | \r | |
| 2ef2b01e A |
154 | #define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)\r |
| 155 | #define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)\r | |
| 156 | \r | |
| 157 | #define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)\r | |
| 1bfda055 | 158 | #define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)\r |
| 159 | #define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)\r | |
| 160 | #define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20\r | |
| 161 | \r | |
| 162 | #define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)\r | |
| 163 | #define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)\r | |
| 164 | #define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)\r | |
| 165 | #define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12\r | |
| 166 | \r | |
| 167 | #define TT_DESCRIPTOR_SECTION_WRITE_BACK(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \\r | |
| 168 | ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \\r | |
| 169 | TT_DESCRIPTOR_SECTION_NG_GLOBAL | \\r | |
| 170 | TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \\r | |
| 171 | TT_DESCRIPTOR_SECTION_DOMAIN(0) | \\r | |
| 172 | TT_DESCRIPTOR_SECTION_AP_RW_RW | \\r | |
| 173 | TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)\r | |
| 174 | #define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \\r | |
| 175 | ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \\r | |
| 176 | TT_DESCRIPTOR_SECTION_NG_GLOBAL | \\r | |
| 177 | TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \\r | |
| 178 | TT_DESCRIPTOR_SECTION_DOMAIN(0) | \\r | |
| 179 | TT_DESCRIPTOR_SECTION_AP_RW_RW | \\r | |
| 180 | TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)\r | |
| 181 | #define TT_DESCRIPTOR_SECTION_DEVICE(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \\r | |
| 182 | ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \\r | |
| 183 | TT_DESCRIPTOR_SECTION_NG_GLOBAL | \\r | |
| 184 | TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \\r | |
| 185 | TT_DESCRIPTOR_SECTION_DOMAIN(0) | \\r | |
| 186 | TT_DESCRIPTOR_SECTION_AP_RW_RW | \\r | |
| 187 | TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)\r | |
| 188 | #define TT_DESCRIPTOR_SECTION_UNCACHED(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \\r | |
| 189 | ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \\r | |
| 190 | TT_DESCRIPTOR_SECTION_NG_GLOBAL | \\r | |
| 191 | TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \\r | |
| 192 | TT_DESCRIPTOR_SECTION_DOMAIN(0) | \\r | |
| 193 | TT_DESCRIPTOR_SECTION_AP_RW_RW | \\r | |
| 194 | TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)\r | |
| 195 | \r | |
| 196 | // Cortex A9 feature bit definitions\r | |
| 197 | #define A9_FEATURE_PARITY (1<<9)\r | |
| 198 | #define A9_FEATURE_AOW (1<<8)\r | |
| 199 | #define A9_FEATURE_EXCL (1<<7)\r | |
| 200 | #define A9_FEATURE_SMP (1<<6)\r | |
| 201 | #define A9_FEATURE_FOZ (1<<3)\r | |
| 202 | #define A9_FEATURE_DPREF (1<<2)\r | |
| 203 | #define A9_FEATURE_HINT (1<<1)\r | |
| 204 | #define A9_FEATURE_FWD (1<<0)\r | |
| 205 | \r | |
| 206 | // SCU register offsets & masks\r | |
| 207 | #define SCU_CONTROL_OFFSET 0x0\r | |
| 208 | #define SCU_CONFIG_OFFSET 0x4\r | |
| 209 | #define SCU_INVALL_OFFSET 0xC\r | |
| 210 | #define SCU_FILT_START_OFFSET 0x40\r | |
| 211 | #define SCU_FILT_END_OFFSET 0x44\r | |
| 212 | #define SCU_SACR_OFFSET 0x50\r | |
| 213 | #define SCU_SSACR_OFFSET 0x54\r | |
| 214 | \r | |
| 215 | #define SMP_GIC_CPUIF_BASE 0x100\r | |
| 216 | #define SMP_GIC_DIST_BASE 0x1000\r | |
| 217 | \r | |
| 218 | // CPACR - Coprocessor Access Control Register defintions\r | |
| 219 | #define CPACR_CP_DENIED(cp) 0x00\r | |
| 220 | #define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)\r | |
| 221 | #define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)\r | |
| 222 | #define CPACR_ASEDIS (1 << 31)\r | |
| 223 | #define CPACR_D32DIS (1 << 30)\r | |
| 224 | #define CPACR_CP_FULL_ACCESS 0x0FFFFFFF\r | |
| 225 | \r | |
| 226 | // NSACR - Non-Secure Access Control Register defintions\r | |
| 227 | #define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)\r | |
| 228 | #define NSACR_NSD32DIS (1 << 14)\r | |
| 229 | #define NSACR_NSASEDIS (1 << 15)\r | |
| 230 | #define NSACR_PLE (1 << 16)\r | |
| 231 | #define NSACR_TL (1 << 17)\r | |
| 232 | #define NSACR_NS_SMP (1 << 18)\r | |
| 233 | #define NSACR_RFR (1 << 19)\r | |
| 234 | \r | |
| 235 | // SCR - Secure Configuration Register defintions\r | |
| 236 | #define SCR_NS (1 << 0)\r | |
| 237 | #define SCR_IRQ (1 << 1)\r | |
| 238 | #define SCR_FIQ (1 << 2)\r | |
| 239 | #define SCR_EA (1 << 3)\r | |
| 240 | #define SCR_FW (1 << 4)\r | |
| 241 | #define SCR_AW (1 << 5)\r | |
| 242 | \r | |
| 243 | VOID\r | |
| 244 | EFIAPI\r | |
| 245 | ArmEnableSWPInstruction (\r | |
| 246 | VOID\r | |
| 247 | );\r | |
| 248 | \r | |
| 249 | VOID\r | |
| 250 | EFIAPI\r | |
| 251 | ArmWriteNsacr (\r | |
| 252 | IN UINT32 SetWayFormat\r | |
| 253 | );\r | |
| 254 | \r | |
| 255 | VOID\r | |
| 256 | EFIAPI\r | |
| 257 | ArmWriteScr (\r | |
| 258 | IN UINT32 SetWayFormat\r | |
| 259 | );\r | |
| 260 | \r | |
| 261 | VOID\r | |
| 262 | EFIAPI\r | |
| 263 | ArmWriteVMBar (\r | |
| 264 | IN UINT32 SetWayFormat\r | |
| 265 | );\r | |
| 266 | \r | |
| 267 | VOID\r | |
| 268 | EFIAPI\r | |
| 269 | ArmWriteVBar (\r | |
| 270 | IN UINT32 SetWayFormat\r | |
| 271 | );\r | |
| 272 | \r | |
| 273 | UINT32\r | |
| 274 | EFIAPI\r | |
| 275 | ArmReadVBar (\r | |
| 276 | VOID\r | |
| 277 | );\r | |
| 278 | \r | |
| 279 | VOID\r | |
| 280 | EFIAPI\r | |
| 281 | ArmWriteCPACR (\r | |
| 282 | IN UINT32 SetWayFormat\r | |
| 283 | );\r | |
| 284 | \r | |
| 285 | VOID\r | |
| 286 | EFIAPI\r | |
| 287 | ArmEnableVFP (\r | |
| 288 | VOID\r | |
| 289 | );\r | |
| 290 | \r | |
| 291 | VOID\r | |
| 292 | EFIAPI\r | |
| 293 | ArmCallWFI (\r | |
| 294 | VOID\r | |
| 295 | );\r | |
| 296 | \r | |
| 297 | VOID\r | |
| 298 | EFIAPI\r | |
| 299 | ArmInvalidScu (\r | |
| 300 | VOID\r | |
| 301 | );\r | |
| 302 | \r | |
| 303 | \r | |
| 304 | UINTN\r | |
| 305 | EFIAPI\r | |
| 306 | ArmGetScuBaseAddress (\r | |
| 307 | VOID\r | |
| 308 | );\r | |
| 309 | \r | |
| 310 | UINT32\r | |
| 311 | EFIAPI\r | |
| 312 | ArmIsScuEnable(\r | |
| 313 | VOID\r | |
| 314 | );\r | |
| 315 | \r | |
| 316 | VOID\r | |
| 317 | EFIAPI\r | |
| 318 | ArmWriteAuxCr (\r | |
| 319 | IN UINT32 Bit\r | |
| 320 | );\r | |
| 321 | \r | |
| 322 | UINT32\r | |
| 323 | EFIAPI\r | |
| 324 | ArmReadAuxCr (\r | |
| 325 | VOID\r | |
| 326 | );\r | |
| 327 | \r | |
| 328 | VOID\r | |
| 329 | EFIAPI\r | |
| 330 | ArmSetAuxCrBit (\r | |
| 331 | IN UINT32 Bits\r | |
| 332 | );\r | |
| 333 | \r | |
| 334 | VOID\r | |
| 335 | EFIAPI\r | |
| 336 | ArmSetupSmpNonSecure (\r | |
| 337 | IN UINTN CoreId\r | |
| 338 | );\r | |
| 339 | \r | |
| 340 | \r | |
| 341 | UINTN \r | |
| 342 | EFIAPI\r | |
| 343 | ArmReadCbar(\r | |
| 344 | VOID\r | |
| 345 | );\r | |
| 346 | \r | |
| 347 | VOID\r | |
| 348 | EFIAPI\r | |
| 349 | ArmInvalidateInstructionAndDataTlb(\r | |
| 350 | VOID\r | |
| 351 | );\r | |
| 352 | \r | |
| 353 | \r | |
| 354 | UINTN\r | |
| 355 | EFIAPI\r | |
| 356 | ArmReadMpidr(\r | |
| 357 | VOID\r | |
| 358 | );\r | |
| 359 | \r | |
| 2ef2b01e | 360 | \r |
| 5dea9bd6 | 361 | #endif // __ARM_V7_H__\r |