ArmPkg: Move TimerDxe and ArmArchTimerLib to new ArmGenericTimerCounterLib

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64ArchTimer.c

/** @file\r
*\r
*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include <Uefi.h>\r
#include <Chipset/AArch64.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/ArmLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include "AArch64Lib.h"\r
#include "ArmLibPrivate.h"\r
#include <Library/ArmArchTimer.h>\r
\r
VOID\r
EFIAPI\r
ArmArchTimerReadReg (\r
    IN   ARM_ARCH_TIMER_REGS   Reg,\r
    OUT  VOID                  *DstBuf\r
    )\r
{\r
  // Check if the Generic/Architecture timer is implemented\r
  if (ArmIsArchTimerImplemented ()) {\r
\r
    switch (Reg) {\r
\r
    case CntFrq:\r
      *((UINTN *)DstBuf) = ArmReadCntFrq ();\r
      break;\r
\r
    case CntPct:\r
      *((UINT64 *)DstBuf) = ArmReadCntPct ();\r
      break;\r
\r
    case CntkCtl:\r
      *((UINTN *)DstBuf) = ArmReadCntkCtl();\r
      break;\r
\r
    case CntpTval:\r
      *((UINTN *)DstBuf) = ArmReadCntpTval ();\r
      break;\r
\r
    case CntpCtl:\r
      *((UINTN *)DstBuf) = ArmReadCntpCtl ();\r
      break;\r
\r
    case CntvTval:\r
      *((UINTN *)DstBuf) = ArmReadCntvTval ();\r
      break;\r
\r
    case CntvCtl:\r
      *((UINTN *)DstBuf) = ArmReadCntvCtl ();\r
      break;\r
\r
    case CntvCt:\r
      *((UINT64 *)DstBuf) = ArmReadCntvCt ();\r
      break;\r
\r
    case CntpCval:\r
      *((UINT64 *)DstBuf) = ArmReadCntpCval ();\r
      break;\r
\r
    case CntvCval:\r
      *((UINT64 *)DstBuf) = ArmReadCntvCval ();\r
      break;\r
\r
    case CntvOff:\r
      *((UINT64 *)DstBuf) = ArmReadCntvOff ();\r
      break;\r
\r
    case CnthCtl:\r
    case CnthpTval:\r
    case CnthpCtl:\r
    case CnthpCval:\r
    DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));\r
      break;\r
\r
    default:\r
      DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));\r
    }\r
  } else {\r
    DEBUG ((EFI_D_ERROR, "Attempt to read ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));\r
    ASSERT (0);\r
  }\r
}\r
\r
VOID\r
EFIAPI\r
ArmArchTimerWriteReg (\r
    IN   ARM_ARCH_TIMER_REGS   Reg,\r
    IN   VOID                  *SrcBuf\r
    )\r
{\r
  // Check if the Generic/Architecture timer is implemented\r
  if (ArmIsArchTimerImplemented ()) {\r
\r
    switch (Reg) {\r
\r
    case CntFrq:\r
      ArmWriteCntFrq (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntPct:\r
      DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTPCT \n"));\r
      break;\r
\r
    case CntkCtl:\r
      ArmWriteCntkCtl (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntpTval:\r
      ArmWriteCntpTval (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntpCtl:\r
      ArmWriteCntpCtl (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntvTval:\r
      ArmWriteCntvTval (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntvCtl:\r
      ArmWriteCntvCtl (*((UINTN *)SrcBuf));\r
      break;\r
\r
    case CntvCt:\r
      DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTVCT \n"));\r
      break;\r
\r
    case CntpCval:\r
      ArmWriteCntpCval (*((UINT64 *)SrcBuf) );\r
      break;\r
\r
    case CntvCval:\r
      ArmWriteCntvCval (*((UINT64 *)SrcBuf) );\r
      break;\r
\r
    case CntvOff:\r
      ArmWriteCntvOff (*((UINT64 *)SrcBuf));\r
      break;\r
\r
    case CnthCtl:\r
    case CnthpTval:\r
    case CnthpCtl:\r
    case CnthpCval:\r
      DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));\r
      break;\r
\r
    default:\r
      DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));\r
    }\r
  } else {\r
    DEBUG ((EFI_D_ERROR, "Attempt to write to ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));\r
    ASSERT (0);\r
  }\r
}\r