[mirror_edk2.git] / ArmPkg / Library / ArmLib / Arm9 / Arm9Support.S

#------------------------------------------------------------------------------ 
#
# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution.  The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#------------------------------------------------------------------------------

.text
.align 2
.globl ASM_PFX(ArmCleanInvalidateDataCache)
.globl ASM_PFX(ArmCleanDataCache)
.globl ASM_PFX(ArmInvalidateDataCache)
.globl ASM_PFX(ArmInvalidateInstructionCache)
.globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu)
.globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache)
.globl ASM_PFX(ArmDisableInstructionCache)
.globl ASM_PFX(ArmEnableBranchPrediction)
.globl ASM_PFX(ArmDisableBranchPrediction)

.set DC_ON, (1<<2)
.set IC_ON, (1<<12)

#------------------------------------------------------------------------------

ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c6, 1   @ invalidate single data cache line                                           
  bx      lr

ASM_PFX(ArmCleanDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c10, 1  @ clean single data cache line     
  bx      lr

ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c14, 1  @ clean and invalidate single data cache line
  bx      lr

ASM_PFX(ArmEnableInstructionCache):
  ldr    r1,=IC_ON
  mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  orr    r0,r0,r1             @Set I bit
  mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  bx     LR
	
ASM_PFX(ArmDisableInstructionCache):
  ldr    r1,=IC_ON
  mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  bic    r0,r0,r1             @Clear I bit.
  mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  bx     LR
	
ASM_PFX(ArmInvalidateInstructionCache):
  mov     r0,#0
  mcr     p15,0,r0,c7,c5,0     @Invalidate entire Instruction cache. 
	                       @Also flushes the branch target cache.
  mov     r0,#0
  mcr     p15,0,r0,c7,c10,4    @Data write buffer
  bx      LR

ASM_PFX(ArmEnableMmu):
  mrc     p15,0,R0,c1,c0,0
  orr     R0,R0,#1
  mcr     p15,0,R0,c1,c0,0
  bx      LR

ASM_PFX(ArmDisableMmu):
  mrc     p15,0,R0,c1,c0,0
  bic     R0,R0,#1
  mcr     p15,0,R0,c1,c0,0
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4     @Drain write buffer
  bx      LR

ASM_PFX(ArmEnableDataCache):
  ldr     R1,=DC_ON
  mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
  orr     R0,R0,R1              @Set C bit
  mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
  bx      LR
	
ASM_PFX(ArmDisableDataCache):
  ldr     R1,=DC_ON
  mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
  bic     R0,R0,R1              @Clear C bit
  mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
  bx      LR

ASM_PFX(ArmCleanDataCache):
  mrc     p15,0,r15,c7,c10,3
  bne     ASM_PFX(ArmCleanDataCache)
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4	@Drain write buffer
  bx      LR
    
ASM_PFX(ArmInvalidateDataCache):
  mov     R0,#0
  mcr     p15,0,R0,c7,c6,0        @Invalidate entire data cache
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4       @Drain write buffer
  bx      LR

ASM_PFX(ArmCleanInvalidateDataCache):
  mrc     p15,0,r15,c7,c14,3
  bne     ASM_PFX(ArmCleanInvalidateDataCache)
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4	      @Drain write buffer
  bx      LR

ASM_PFX(ArmEnableBranchPrediction):
  bx      LR                      @Branch prediction is not supported.

ASM_PFX(ArmDisableBranchPrediction):
  bx      LR                      @Branch prediction is not supported.

ASM_FUNCTION_REMOVE_IF_UNREFERENCED
Commit	Line	Data
2ef2b01e A	1	#------------------------------------------------------------------------------
	2	#
	3	# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
	4	#
	5	# All rights reserved. This program and the accompanying materials
	6	# are licensed and made available under the terms and conditions of the BSD License
	7	# which accompanies this distribution. The full text of the license may be found at
	8	# http://opensource.org/licenses/bsd-license.php
	9	#
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
	12	#
	13	#------------------------------------------------------------------------------
	14
	15	.text
	16	.align 2
	17	.globl ASM_PFX(ArmCleanInvalidateDataCache)
	18	.globl ASM_PFX(ArmCleanDataCache)
	19	.globl ASM_PFX(ArmInvalidateDataCache)
	20	.globl ASM_PFX(ArmInvalidateInstructionCache)
	21	.globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
	22	.globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
	23	.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
	24	.globl ASM_PFX(ArmEnableMmu)
	25	.globl ASM_PFX(ArmDisableMmu)
	26	.globl ASM_PFX(ArmEnableDataCache)
	27	.globl ASM_PFX(ArmDisableDataCache)
	28	.globl ASM_PFX(ArmEnableInstructionCache)
	29	.globl ASM_PFX(ArmDisableInstructionCache)
	30	.globl ASM_PFX(ArmEnableBranchPrediction)
	31	.globl ASM_PFX(ArmDisableBranchPrediction)
	32
	33	.set DC_ON, (1<<2)
	34	.set IC_ON, (1<<12)
	35
	36	#------------------------------------------------------------------------------
	37
	38	ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
	39	mcr p15, 0, r0, c7, c6, 1 @ invalidate single data cache line
	40	bx lr
	41
	42	ASM_PFX(ArmCleanDataCacheEntryByMVA):
	43	mcr p15, 0, r0, c7, c10, 1 @ clean single data cache line
	44	bx lr
	45
	46	ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
	47	mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate single data cache line
	48	bx lr
	49
	50	ASM_PFX(ArmEnableInstructionCache):
	51	ldr r1,=IC_ON
	52	mrc p15,0,r0,c1,c0,0 @Read control register configuration data
	53	orr r0,r0,r1 @Set I bit
	54	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	55	bx LR
	56
	57	ASM_PFX(ArmDisableInstructionCache):
	58	ldr r1,=IC_ON
	59	mrc p15,0,r0,c1,c0,0 @Read control register configuration data
	60	bic r0,r0,r1 @Clear I bit.
	61	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	62	bx LR
	63
	64	ASM_PFX(ArmInvalidateInstructionCache):
65	mov r0,#0
66	mcr p15,0,r0,c7,c5,0 @Invalidate entire Instruction cache.
67	@Also flushes the branch target cache.
68	mov r0,#0
69	mcr p15,0,r0,c7,c10,4 @Data write buffer
70	bx LR
71
72	ASM_PFX(ArmEnableMmu):
73	mrc p15,0,R0,c1,c0,0
74	orr R0,R0,#1
75	mcr p15,0,R0,c1,c0,0
76	bx LR
77
78	ASM_PFX(ArmDisableMmu):
79	mrc p15,0,R0,c1,c0,0
80	bic R0,R0,#1
81	mcr p15,0,R0,c1,c0,0
82	mov R0,#0
83	mcr p15,0,R0,c7,c10,4 @Drain write buffer
84	bx LR
85
86	ASM_PFX(ArmEnableDataCache):
87	ldr R1,=DC_ON
88	mrc p15,0,R0,c1,c0,0 @Read control register configuration data
89	orr R0,R0,R1 @Set C bit
90	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
91	bx LR
92
93	ASM_PFX(ArmDisableDataCache):
94	ldr R1,=DC_ON
95	mrc p15,0,R0,c1,c0,0 @Read control register configuration data
96	bic R0,R0,R1 @Clear C bit
97	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
98	bx LR
99
100	ASM_PFX(ArmCleanDataCache):
101	mrc p15,0,r15,c7,c10,3
102	bne ASM_PFX(ArmCleanDataCache)
103	mov R0,#0
104	mcr p15,0,R0,c7,c10,4 @Drain write buffer
105	bx LR
106
107	ASM_PFX(ArmInvalidateDataCache):
108	mov R0,#0
109	mcr p15,0,R0,c7,c6,0 @Invalidate entire data cache
110	mov R0,#0
111	mcr p15,0,R0,c7,c10,4 @Drain write buffer
112	bx LR
113
114	ASM_PFX(ArmCleanInvalidateDataCache):
115	mrc p15,0,r15,c7,c14,3
116	bne ASM_PFX(ArmCleanInvalidateDataCache)
117	mov R0,#0
118	mcr p15,0,R0,c7,c10,4 @Drain write buffer
119	bx LR
120
121	ASM_PFX(ArmEnableBranchPrediction):
122	bx LR @Branch prediction is not supported.
123
124	ASM_PFX(ArmDisableBranchPrediction):
125	bx LR @Branch prediction is not supported.
126
127	ASM_FUNCTION_REMOVE_IF_UNREFERENCED
128