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1a27eb48 | 1 | #------------------------------------------------------------------------------ |
2 | # | |
d6ebcab7 | 3 | # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR> |
1a27eb48 | 4 | # |
d6ebcab7 | 5 | # This program and the accompanying materials |
1a27eb48 | 6 | # are licensed and made available under the terms and conditions of the BSD License |
7 | # which accompanies this distribution. The full text of the license may be found at | |
8 | # http://opensource.org/licenses/bsd-license.php | |
9 | # | |
10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | # | |
13 | #------------------------------------------------------------------------------ | |
14 | ||
1a27eb48 | 15 | .globl ASM_PFX(Cp15IdCode) |
63ca7402 | 16 | INTERWORK_FUNC(Cp15IdCode) |
1a27eb48 | 17 | .globl ASM_PFX(Cp15CacheInfo) |
63ca7402 | 18 | INTERWORK_FUNC(Cp15CacheInfo) |
1a27eb48 | 19 | .globl ASM_PFX(ArmEnableInterrupts) |
63ca7402 | 20 | INTERWORK_FUNC(ArmEnableInterrupts) |
1a27eb48 | 21 | .globl ASM_PFX(ArmDisableInterrupts) |
63ca7402 | 22 | INTERWORK_FUNC(ArmDisableInterrupts) |
1a27eb48 | 23 | .globl ASM_PFX(ArmGetInterruptState) |
63ca7402 | 24 | INTERWORK_FUNC(ArmGetInterruptState) |
0416278c | 25 | .globl ASM_PFX(ArmEnableFiq) |
63ca7402 | 26 | INTERWORK_FUNC(ArmEnableFiq) |
0416278c | 27 | .globl ASM_PFX(ArmDisableFiq) |
63ca7402 | 28 | INTERWORK_FUNC(ArmDisableFiq) |
0416278c | 29 | .globl ASM_PFX(ArmGetFiqState) |
63ca7402 | 30 | INTERWORK_FUNC(ArmGetFiqState) |
1a27eb48 | 31 | .globl ASM_PFX(ArmInvalidateTlb) |
63ca7402 | 32 | INTERWORK_FUNC(ArmInvalidateTlb) |
1a27eb48 | 33 | .globl ASM_PFX(ArmSetTranslationTableBaseAddress) |
63ca7402 | 34 | INTERWORK_FUNC(ArmSetTranslationTableBaseAddress) |
1a27eb48 | 35 | .globl ASM_PFX(ArmGetTranslationTableBaseAddress) |
63ca7402 | 36 | INTERWORK_FUNC(ArmGetTranslationTableBaseAddress) |
1a27eb48 | 37 | .globl ASM_PFX(ArmSetDomainAccessControl) |
63ca7402 | 38 | INTERWORK_FUNC(ArmSetDomainAccessControl) |
bb02cb80 | 39 | .globl ASM_PFX(ArmUpdateTranslationTableEntry) |
63ca7402 | 40 | INTERWORK_FUNC(ArmUpdateTranslationTableEntry) |
1a27eb48 | 41 | .globl ASM_PFX(CPSRMaskInsert) |
63ca7402 | 42 | INTERWORK_FUNC(CPSRMaskInsert) |
1a27eb48 | 43 | .globl ASM_PFX(CPSRRead) |
63ca7402 | 44 | INTERWORK_FUNC(CPSRRead) |
98bc0c8c | 45 | .globl ASM_PFX(ReadCCSIDR) |
63ca7402 | 46 | INTERWORK_FUNC(ReadCCSIDR) |
98bc0c8c | 47 | .globl ASM_PFX(ReadCLIDR) |
63ca7402 | 48 | INTERWORK_FUNC(ReadCLIDR) |
98bc0c8c | 49 | |
bb02cb80 | 50 | .text |
51 | .align 2 | |
1a27eb48 | 52 | |
53 | #------------------------------------------------------------------------------ | |
54 | ||
55 | ASM_PFX(Cp15IdCode): | |
56 | mrc p15,0,R0,c0,c0,0 | |
57 | bx LR | |
58 | ||
59 | ASM_PFX(Cp15CacheInfo): | |
60 | mrc p15,0,R0,c0,c0,1 | |
61 | bx LR | |
62 | ||
63 | ASM_PFX(ArmEnableInterrupts): | |
98bc0c8c | 64 | cpsie i |
1a27eb48 | 65 | bx LR |
66 | ||
67 | ASM_PFX(ArmDisableInterrupts): | |
98bc0c8c | 68 | cpsid i |
1a27eb48 | 69 | bx LR |
70 | ||
71 | ASM_PFX(ArmGetInterruptState): | |
72 | mrs R0,CPSR | |
73 | tst R0,#0x80 @Check if IRQ is enabled. | |
74 | moveq R0,#1 | |
75 | movne R0,#0 | |
76 | bx LR | |
77 | ||
0416278c | 78 | ASM_PFX(ArmEnableFiq): |
79 | cpsie f | |
80 | bx LR | |
81 | ||
82 | ASM_PFX(ArmDisableFiq): | |
83 | cpsid f | |
84 | bx LR | |
85 | ||
86 | ASM_PFX(ArmGetFiqState): | |
87 | mrs R0,CPSR | |
bb02cb80 | 88 | tst R0,#0x40 @Check if FIQ is enabled. |
0416278c | 89 | moveq R0,#1 |
90 | movne R0,#0 | |
91 | bx LR | |
92 | ||
1a27eb48 | 93 | ASM_PFX(ArmInvalidateTlb): |
94 | mov r0,#0 | |
95 | mcr p15,0,r0,c8,c7,0 | |
bb02cb80 | 96 | mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp |
97 | dsb | |
98bc0c8c | 98 | isb |
1a27eb48 | 99 | bx lr |
100 | ||
101 | ASM_PFX(ArmSetTranslationTableBaseAddress): | |
102 | mcr p15,0,r0,c2,c0,0 | |
98bc0c8c | 103 | isb |
1a27eb48 | 104 | bx lr |
105 | ||
106 | ASM_PFX(ArmGetTranslationTableBaseAddress): | |
107 | mrc p15,0,r0,c2,c0,0 | |
bb02cb80 | 108 | isb |
1a27eb48 | 109 | bx lr |
110 | ||
111 | ||
112 | ASM_PFX(ArmSetDomainAccessControl): | |
113 | mcr p15,0,r0,c3,c0,0 | |
98bc0c8c | 114 | isb |
1a27eb48 | 115 | bx lr |
116 | ||
bb02cb80 | 117 | // |
118 | //VOID | |
119 | //ArmUpdateTranslationTableEntry ( | |
120 | // IN VOID *TranslationTableEntry // R0 | |
121 | // IN VOID *MVA // R1 | |
122 | // ); | |
123 | ASM_PFX(ArmUpdateTranslationTableEntry): | |
124 | mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA | |
125 | dsb | |
126 | mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA | |
127 | mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp | |
128 | dsb | |
129 | isb | |
130 | bx lr | |
131 | ||
1a27eb48 | 132 | ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to insert |
133 | stmfd sp!, {r4-r12, lr} @ save all the banked registers | |
134 | mov r3, sp @ copy the stack pointer into a non-banked register | |
135 | mrs r2, cpsr @ read the cpsr | |
136 | bic r2, r2, r0 @ clear mask in the cpsr | |
137 | and r1, r1, r0 @ clear bits outside the mask in the input | |
138 | orr r2, r2, r1 @ set field | |
139 | msr cpsr_cxsf, r2 @ write back cpsr (may have caused a mode switch) | |
bb02cb80 | 140 | isb |
1a27eb48 | 141 | mov sp, r3 @ restore stack pointer |
142 | ldmfd sp!, {r4-r12, lr} @ restore registers | |
143 | bx lr @ return (hopefully thumb-safe!) | |
144 | ||
145 | ASM_PFX(CPSRRead): | |
146 | mrs r0, cpsr | |
147 | bx lr | |
148 | ||
bb02cb80 | 149 | // UINT32 |
150 | // ReadCCSIDR ( | |
151 | // IN UINT32 CSSELR | |
152 | // ) | |
98bc0c8c | 153 | ASM_PFX(ReadCCSIDR): |
154 | mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR) | |
155 | isb | |
156 | mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR) | |
157 | bx lr | |
158 | ||
bb02cb80 | 159 | // UINT32 |
160 | // ReadCLIDR ( | |
161 | // IN UINT32 CSSELR | |
162 | // ) | |
98bc0c8c | 163 | ASM_PFX(ReadCLIDR): |
164 | mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register | |
bb02cb80 | 165 | bx lr |
98bc0c8c | 166 | |
1a27eb48 | 167 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED |