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1 | /** @file\r |
2 | \r | |
d6ebcab7 | 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
2ef2b01e | 4 | \r |
d6ebcab7 | 5 | This program and the accompanying materials\r |
2ef2b01e A |
6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include <Base.h>\r | |
16 | \r | |
17 | #include <Library/ArmLib.h>\r | |
18 | #include <Library/DebugLib.h>\r | |
19 | #include <Library/PcdLib.h>\r | |
20 | \r | |
21 | #include "ArmLibPrivate.h"\r | |
22 | \r | |
23 | VOID\r | |
24 | EFIAPI\r | |
25 | ArmCacheInformation (\r | |
26 | OUT ARM_CACHE_INFO *CacheInfo\r | |
27 | )\r | |
28 | {\r | |
29 | if (CacheInfo != NULL) {\r | |
30 | CacheInfo->Type = ArmCacheType();\r | |
31 | CacheInfo->Architecture = ArmCacheArchitecture();\r | |
32 | CacheInfo->DataCachePresent = ArmDataCachePresent();\r | |
33 | CacheInfo->DataCacheSize = ArmDataCacheSize();\r | |
34 | CacheInfo->DataCacheAssociativity = ArmDataCacheAssociativity();\r | |
35 | CacheInfo->DataCacheLineLength = ArmDataCacheLineLength();\r | |
36 | CacheInfo->InstructionCachePresent = ArmInstructionCachePresent();\r | |
37 | CacheInfo->InstructionCacheSize = ArmInstructionCacheSize();\r | |
38 | CacheInfo->InstructionCacheAssociativity = ArmInstructionCacheAssociativity();\r | |
39 | CacheInfo->InstructionCacheLineLength = ArmInstructionCacheLineLength();\r | |
40 | }\r | |
41 | }\r | |
42 | \r | |
43 | VOID\r | |
44 | EFIAPI\r | |
45 | ArmSwitchProcessorMode (\r | |
46 | IN ARM_PROCESSOR_MODE Mode\r | |
47 | )\r | |
48 | {\r | |
49 | CPSRMaskInsert(ARM_PROCESSOR_MODE_MASK, Mode);\r | |
50 | }\r | |
51 | \r | |
52 | \r | |
53 | ARM_PROCESSOR_MODE\r | |
54 | EFIAPI\r | |
55 | ArmProcessorMode (\r | |
56 | VOID\r | |
57 | )\r | |
58 | {\r | |
59 | return (ARM_PROCESSOR_MODE)(CPSRRead() & (UINT32)ARM_PROCESSOR_MODE_MASK);\r | |
60 | }\r |