[mirror_edk2.git] / ArmPkg / Library / DefaultExceptionHandlerLib / Arm / DefaultExceptionHandler.c

/** @file\r
  Default exception handler\r
\r
  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
  Copyright (c) 2012 - 2021, Arm Ltd. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Uefi.h>\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PeCoffGetEntryPointLib.h>\r
#include <Library/PrintLib.h>\r
#include <Library/ArmDisassemblerLib.h>\r
#include <Library/SerialPortLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UefiLib.h>\r
\r
#include <Guid/DebugImageInfoTable.h>\r
\r
#include <Protocol/DebugSupport.h>\r
#include <Library/DefaultExceptionHandlerLib.h>\r
\r
//\r
// The number of elements in a CHAR8 array, including the terminating NUL, that\r
// is meant to hold the string rendering of the CPSR.\r
//\r
#define CPSR_STRING_SIZE 32\r
\r
typedef struct {\r
  UINT32  BIT;\r
  CHAR8   Char;\r
} CPSR_CHAR;\r
\r
STATIC CONST CPSR_CHAR mCpsrChar[] = {\r
  { 31, 'n' },\r
  { 30, 'z' },\r
  { 29, 'c' },\r
  { 28, 'v' },\r
\r
  { 9,  'e' },\r
  { 8,  'a' },\r
  { 7,  'i' },\r
  { 6,  'f' },\r
  { 5,  't' },\r
  { 0,  '?' }\r
};\r
\r
CHAR8 *\r
GetImageName (\r
  IN  UINTN  FaultAddress,\r
  OUT UINTN  *ImageBase,\r
  OUT UINTN  *PeCoffSizeOfHeaders\r
  );\r
\r
/**\r
  Convert the Current Program Status Register (CPSR) to a string. The string is\r
  a defacto standard in the ARM world.\r
\r
  It is possible to add extra bits by adding them to mCpsrChar array.\r
\r
  @param  Cpsr         ARM CPSR register value\r
  @param  ReturnStr    CPSR_STRING_SIZE byte string that contains string\r
                       version of CPSR\r
\r
**/\r
VOID\r
CpsrString (\r
  IN  UINT32  Cpsr,\r
  OUT CHAR8   *ReturnStr\r
  )\r
{\r
  UINTN     Index;\r
  CHAR8*    Str;\r
  CHAR8*    ModeStr;\r
\r
  Str = ReturnStr;\r
\r
  for (Index = 0; mCpsrChar[Index].BIT != 0; Index++, Str++) {\r
    *Str = mCpsrChar[Index].Char;\r
    if ((Cpsr & (1 << mCpsrChar[Index].BIT)) != 0) {\r
      // Concert to upper case if bit is set\r
      *Str &= ~0x20;\r
    }\r
  }\r
\r
  *Str++ = '_';\r
  *Str = '\0';\r
\r
  switch (Cpsr & 0x1f) {\r
  case 0x10:\r
    ModeStr = "usr";\r
    break;\r
  case 0x011:\r
    ModeStr = "fiq";\r
    break;\r
  case 0x12:\r
    ModeStr = "irq";\r
    break;\r
  case 0x13:\r
    ModeStr = "svc";\r
    break;\r
  case 0x16:\r
    ModeStr = "mon";\r
    break;\r
  case 0x17:\r
    ModeStr = "abt";\r
    break;\r
  case 0x1b:\r
    ModeStr = "und";\r
    break;\r
  case 0x1f:\r
    ModeStr = "sys";\r
    break;\r
\r
  default:\r
    ModeStr = "???";\r
    break;\r
  }\r
\r
  //\r
  // See the interface contract in the leading comment block.\r
  //\r
  AsciiStrCatS (Str, CPSR_STRING_SIZE - (Str - ReturnStr), ModeStr);\r
}\r
\r
CHAR8 *\r
FaultStatusToString (\r
  IN  UINT32  Status\r
  )\r
{\r
  CHAR8 *FaultSource;\r
\r
  switch (Status) {\r
    case 0x01: FaultSource = "Alignment fault"; break;\r
    case 0x02: FaultSource = "Debug event fault"; break;\r
    case 0x03: FaultSource = "Access Flag fault on Section"; break;\r
    case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;\r
    case 0x05: FaultSource = "Translation fault on Section"; break;\r
    case 0x06: FaultSource = "Access Flag fault on Page"; break;\r
    case 0x07: FaultSource = "Translation fault on Page"; break;\r
    case 0x08: FaultSource = "Precise External Abort"; break;\r
    case 0x09: FaultSource = "Domain fault on Section"; break;\r
    case 0x0b: FaultSource = "Domain fault on Page"; break;\r
    case 0x0c: FaultSource = "External abort on translation, first level"; break;\r
    case 0x0d: FaultSource = "Permission fault on Section"; break;\r
    case 0x0e: FaultSource = "External abort on translation, second level"; break;\r
    case 0x0f: FaultSource = "Permission fault on Page"; break;\r
    case 0x16: FaultSource = "Imprecise External Abort"; break;\r
    default:   FaultSource = "No function"; break;\r
    }\r
\r
  return FaultSource;\r
}\r
\r
STATIC CHAR8 *gExceptionTypeString[] = {\r
  "Reset",\r
  "Undefined OpCode",\r
  "SVC",\r
  "Prefetch Abort",\r
  "Data Abort",\r
  "Undefined",\r
  "IRQ",\r
  "FIQ"\r
};\r
\r
/**\r
  This is the default action to take on an unexpected exception\r
\r
  Since this is exception context don't do anything crazy like try to allocate memory.\r
\r
  @param  ExceptionType    Type of the exception\r
  @param  SystemContext    Register state at the time of the Exception\r
\r
\r
**/\r
VOID\r
DefaultExceptionHandler (\r
  IN     EFI_EXCEPTION_TYPE           ExceptionType,\r
  IN OUT EFI_SYSTEM_CONTEXT           SystemContext\r
  )\r
{\r
  CHAR8     Buffer[100];\r
  UINTN     CharCount;\r
  UINT32    DfsrStatus;\r
  UINT32    IfsrStatus;\r
  BOOLEAN   DfsrWrite;\r
  UINT32    PcAdjust;\r
\r
  PcAdjust = 0;\r
\r
  CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x  CPSR 0x%08x ",\r
         gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);\r
  SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
  if (gST->ConOut != NULL) {\r
    AsciiPrint (Buffer);\r
  }\r
\r
  DEBUG_CODE_BEGIN ();\r
    CHAR8   *Pdb;\r
    UINT32  ImageBase;\r
    UINT32  PeCoffSizeOfHeader;\r
    UINT32  Offset;\r
    CHAR8   CpsrStr[CPSR_STRING_SIZE];  // char per bit. Lower 5-bits are mode\r
                                        // that is a 3 char string\r
    CHAR8   Buffer[80];\r
    UINT8   *DisAsm;\r
    UINT32  ItBlock;\r
\r
    CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);\r
    DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));\r
\r
    Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);\r
    Offset = SystemContext.SystemContextArm->PC - ImageBase;\r
    if (Pdb != NULL) {\r
      DEBUG ((EFI_D_ERROR, "%a\n", Pdb));\r
\r
      //\r
      // A PE/COFF image loads its headers into memory so the headers are\r
      // included in the linked addresses. ELF and Mach-O images do not\r
      // include the headers so the first byte of the image is usually\r
      // text (code). If you look at link maps from ELF or Mach-O images\r
      // you need to subtract out the size of the PE/COFF header to get\r
      // get the offset that matches the link map.\r
      //\r
      DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));\r
\r
      // If we come from an image it is safe to show the instruction. We know it should not fault\r
      DisAsm = (UINT8 *)(UINTN)SystemContext.SystemContextArm->PC;\r
      ItBlock = 0;\r
      DisassembleInstruction (&DisAsm, (SystemContext.SystemContextArm->CPSR & BIT5) == BIT5, TRUE, &ItBlock, Buffer, sizeof (Buffer));\r
      DEBUG ((EFI_D_ERROR, "\n%a", Buffer));\r
\r
      switch (ExceptionType) {\r
      case EXCEPT_ARM_UNDEFINED_INSTRUCTION:\r
      case EXCEPT_ARM_SOFTWARE_INTERRUPT:\r
      case EXCEPT_ARM_PREFETCH_ABORT:\r
      case EXCEPT_ARM_DATA_ABORT:\r
        // advance PC past the faulting instruction\r
        PcAdjust = (UINTN)DisAsm - SystemContext.SystemContextArm->PC;\r
        break;\r
\r
      default:\r
        break;\r
      }\r
\r
    }\r
  DEBUG_CODE_END ();\r
  DEBUG ((EFI_D_ERROR, "\n  R0 0x%08x   R1 0x%08x   R2 0x%08x   R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));\r
  DEBUG ((EFI_D_ERROR, "  R4 0x%08x   R5 0x%08x   R6 0x%08x   R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));\r
  DEBUG ((EFI_D_ERROR, "  R8 0x%08x   R9 0x%08x  R10 0x%08x  R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));\r
  DEBUG ((EFI_D_ERROR, " R12 0x%08x   SP 0x%08x   LR 0x%08x   PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));\r
  DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));\r
\r
  // Bit10 is Status[4] Bit3:0 is Status[3:0]\r
  DfsrStatus = (SystemContext.SystemContextArm->DFSR & 0xf) | ((SystemContext.SystemContextArm->DFSR >> 6) & 0x10);\r
  DfsrWrite = (SystemContext.SystemContextArm->DFSR & BIT11) != 0;\r
  if (DfsrStatus != 0x00) {\r
    DEBUG ((EFI_D_ERROR, " %a: %a 0x%08x\n", FaultStatusToString (DfsrStatus), DfsrWrite ? "write to" : "read from", SystemContext.SystemContextArm->DFAR));\r
  }\r
\r
  IfsrStatus = (SystemContext.SystemContextArm->IFSR & 0xf) | ((SystemContext.SystemContextArm->IFSR >> 6) & 0x10);\r
  if (IfsrStatus != 0) {\r
    DEBUG ((EFI_D_ERROR, " Instruction %a at 0x%08x\n", FaultStatusToString (SystemContext.SystemContextArm->IFSR & 0xf), SystemContext.SystemContextArm->IFAR));\r
  }\r
\r
  DEBUG ((EFI_D_ERROR, "\n"));\r
  ASSERT (FALSE);\r
\r
  CpuDeadLoop ();   // may return if executing under a debugger\r
\r
  // Clear the error registers that we have already displayed incase some one wants to keep going\r
  SystemContext.SystemContextArm->DFSR = 0;\r
  SystemContext.SystemContextArm->IFSR = 0;\r
\r
  // If some one is stepping past the exception handler adjust the PC to point to the next instruction\r
  SystemContext.SystemContextArm->PC += PcAdjust;\r
}\r
Commit	Line	Data
6f72e28d	1	/** @file\r
	2	Default exception handler\r
	3	\r
d6ebcab7	4	Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
7785b38a	5	Copyright (c) 2012 - 2021, Arm Ltd. All rights reserved.<BR>\r
3402aac7	6	\r
4059386c	7	SPDX-License-Identifier: BSD-2-Clause-Patent\r
6f72e28d	8	\r
	9	**/\r
	10	\r
	11	#include <Uefi.h>\r
6f72e28d	12	#include <Library/BaseLib.h>\r
	13	#include <Library/DebugLib.h>\r
	14	#include <Library/PeCoffGetEntryPointLib.h>\r
7755dfd3	15	#include <Library/PrintLib.h>\r
097bd461	16	#include <Library/ArmDisassemblerLib.h>\r
7755dfd3	17	#include <Library/SerialPortLib.h>\r
31f53880	18	#include <Library/UefiBootServicesTableLib.h>\r
00755e1c	19	#include <Library/UefiLib.h>\r
6f72e28d	20	\r
6f72e28d	21	#include <Guid/DebugImageInfoTable.h>\r
6f72e28d	22	\r
619b3998	23	#include <Protocol/DebugSupport.h>\r
619b3998	24	#include <Library/DefaultExceptionHandlerLib.h>\r
6f72e28d	25	\r
a1848bc0 LE	26	//\r
	27	// The number of elements in a CHAR8 array, including the terminating NUL, that\r
	28	// is meant to hold the string rendering of the CPSR.\r
	29	//\r
	30	#define CPSR_STRING_SIZE 32\r
	31	\r
6f72e28d	32	typedef struct {\r
	33	UINT32 BIT;\r
	34	CHAR8 Char;\r
	35	} CPSR_CHAR;\r
	36	\r
7785b38a PG	37	STATIC CONST CPSR_CHAR mCpsrChar[] = {\r
	38	{ 31, 'n' },\r
	39	{ 30, 'z' },\r
	40	{ 29, 'c' },\r
	41	{ 28, 'v' },\r
	42	\r
	43	{ 9, 'e' },\r
	44	{ 8, 'a' },\r
	45	{ 7, 'i' },\r
	46	{ 6, 'f' },\r
	47	{ 5, 't' },\r
	48	{ 0, '?' }\r
	49	};\r
	50	\r
6f72e28d	51	CHAR8 *\r
6f72e28d	52	GetImageName (\r
c63626b7	53	IN UINTN FaultAddress,\r
	54	OUT UINTN *ImageBase,\r
	55	OUT UINTN *PeCoffSizeOfHeaders\r
619b3998	56	);\r
6f72e28d	57	\r
6f72e28d	58	/**\r
3402aac7 RC	59	Convert the Current Program Status Register (CPSR) to a string. The string is\r
	60	a defacto standard in the ARM world.\r
	61	\r
7785b38a	62	It is possible to add extra bits by adding them to mCpsrChar array.\r
6f72e28d	63	\r
6f72e28d	64	@param Cpsr ARM CPSR register value\r
a1848bc0 LE	65	@param ReturnStr CPSR_STRING_SIZE byte string that contains string\r
a1848bc0 LE	66	version of CPSR\r
6f72e28d	67	\r
	68	**/\r
	69	VOID\r
	70	CpsrString (\r
	71	IN UINT32 Cpsr,\r
	72	OUT CHAR8 *ReturnStr\r
	73	)\r
	74	{\r
11c20f4e	75	UINTN Index;\r
	76	CHAR8* Str;\r
	77	CHAR8* ModeStr;\r
3402aac7	78	\r
11c20f4e	79	Str = ReturnStr;\r
11c20f4e	80	\r
7785b38a PG	81	for (Index = 0; mCpsrChar[Index].BIT != 0; Index++, Str++) {\r
	82	*Str = mCpsrChar[Index].Char;\r
	83	if ((Cpsr & (1 << mCpsrChar[Index].BIT)) != 0) {\r
6f72e28d	84	// Concert to upper case if bit is set\r
	85	*Str &= ~0x20;\r
	86	}\r
	87	}\r
3402aac7	88	\r
6f72e28d	89	*Str++ = '_';\r
6f72e28d	90	*Str = '\0';\r
3402aac7	91	\r
6f72e28d	92	switch (Cpsr & 0x1f) {\r
	93	case 0x10:\r
	94	ModeStr = "usr";\r
	95	break;\r
	96	case 0x011:\r
	97	ModeStr = "fiq";\r
	98	break;\r
	99	case 0x12:\r
	100	ModeStr = "irq";\r
	101	break;\r
	102	case 0x13:\r
	103	ModeStr = "svc";\r
	104	break;\r
	105	case 0x16:\r
	106	ModeStr = "mon";\r
	107	break;\r
	108	case 0x17:\r
	109	ModeStr = "abt";\r
	110	break;\r
	111	case 0x1b:\r
	112	ModeStr = "und";\r
	113	break;\r
	114	case 0x1f:\r
	115	ModeStr = "sys";\r
	116	break;\r
3402aac7	117	\r
6f72e28d	118	default:\r
	119	ModeStr = "???";\r
	120	break;\r
	121	}\r
3402aac7	122	\r
a1848bc0 LE	123	//\r
	124	// See the interface contract in the leading comment block.\r
	125	//\r
	126	AsciiStrCatS (Str, CPSR_STRING_SIZE - (Str - ReturnStr), ModeStr);\r
3402aac7	127	}\r
d5b0f232	128	\r
	129	CHAR8 *\r
	130	FaultStatusToString (\r
	131	IN UINT32 Status\r
	132	)\r
	133	{\r
	134	CHAR8 *FaultSource;\r
	135	\r
	136	switch (Status) {\r
	137	case 0x01: FaultSource = "Alignment fault"; break;\r
	138	case 0x02: FaultSource = "Debug event fault"; break;\r
	139	case 0x03: FaultSource = "Access Flag fault on Section"; break;\r
	140	case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;\r
	141	case 0x05: FaultSource = "Translation fault on Section"; break;\r
	142	case 0x06: FaultSource = "Access Flag fault on Page"; break;\r
	143	case 0x07: FaultSource = "Translation fault on Page"; break;\r
	144	case 0x08: FaultSource = "Precise External Abort"; break;\r
	145	case 0x09: FaultSource = "Domain fault on Section"; break;\r
	146	case 0x0b: FaultSource = "Domain fault on Page"; break;\r
	147	case 0x0c: FaultSource = "External abort on translation, first level"; break;\r
	148	case 0x0d: FaultSource = "Permission fault on Section"; break;\r
	149	case 0x0e: FaultSource = "External abort on translation, second level"; break;\r
	150	case 0x0f: FaultSource = "Permission fault on Page"; break;\r
	151	case 0x16: FaultSource = "Imprecise External Abort"; break;\r
	152	default: FaultSource = "No function"; break;\r
	153	}\r
	154	\r
	155	return FaultSource;\r
	156	}\r
	157	\r
11c20f4e	158	STATIC CHAR8 *gExceptionTypeString[] = {\r
6f72e28d	159	"Reset",\r
6f72e28d	160	"Undefined OpCode",\r
619b3998	161	"SVC",\r
6f72e28d	162	"Prefetch Abort",\r
	163	"Data Abort",\r
	164	"Undefined",\r
	165	"IRQ",\r
	166	"FIQ"\r
	167	};\r
	168	\r
6f72e28d	169	/**\r
6f72e28d	170	This is the default action to take on an unexpected exception\r
3402aac7	171	\r
ff5fef14	172	Since this is exception context don't do anything crazy like try to allocate memory.\r
6f72e28d	173	\r
	174	@param ExceptionType Type of the exception\r
	175	@param SystemContext Register state at the time of the Exception\r
	176	\r
	177	\r
	178	**/\r
	179	VOID\r
	180	DefaultExceptionHandler (\r
	181	IN EFI_EXCEPTION_TYPE ExceptionType,\r
	182	IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
	183	)\r
	184	{\r
7755dfd3	185	CHAR8 Buffer[100];\r
7755dfd3	186	UINTN CharCount;\r
d5b0f232	187	UINT32 DfsrStatus;\r
65e27445	188	UINT32 IfsrStatus;\r
d5b0f232	189	BOOLEAN DfsrWrite;\r
7785b38a PG	190	UINT32 PcAdjust;\r
	191	\r
	192	PcAdjust = 0;\r
6f72e28d	193	\r
7755dfd3	194	CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ",\r
91c38d4e	195	gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);\r
31f53880 AB	196	SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
	197	if (gST->ConOut != NULL) {\r
	198	AsciiPrint (Buffer);\r
	199	}\r
7755dfd3	200	\r
6f72e28d	201	DEBUG_CODE_BEGIN ();\r
	202	CHAR8 *Pdb;\r
	203	UINT32 ImageBase;\r
	204	UINT32 PeCoffSizeOfHeader;\r
	205	UINT32 Offset;\r
a1848bc0 LE	206	CHAR8 CpsrStr[CPSR_STRING_SIZE]; // char per bit. Lower 5-bits are mode\r
a1848bc0 LE	207	// that is a 3 char string\r
6f72e28d	208	CHAR8 Buffer[80];\r
097bd461	209	UINT8 *DisAsm;\r
f3198cba	210	UINT32 ItBlock;\r
3402aac7	211	\r
6f72e28d	212	CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);\r
6f72e28d	213	DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));\r
3402aac7	214	\r
6f72e28d	215	Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);\r
	216	Offset = SystemContext.SystemContextArm->PC - ImageBase;\r
	217	if (Pdb != NULL) {\r
	218	DEBUG ((EFI_D_ERROR, "%a\n", Pdb));\r
	219	\r
	220	//\r
3402aac7	221	// A PE/COFF image loads its headers into memory so the headers are\r
11c20f4e	222	// included in the linked addresses. ELF and Mach-O images do not\r
6f72e28d	223	// include the headers so the first byte of the image is usually\r
6f72e28d	224	// text (code). If you look at link maps from ELF or Mach-O images\r
11c20f4e	225	// you need to subtract out the size of the PE/COFF header to get\r
3402aac7	226	// get the offset that matches the link map.\r
6f72e28d	227	//\r
6f72e28d	228	DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));\r
3402aac7	229	\r
6f72e28d	230	// If we come from an image it is safe to show the instruction. We know it should not fault\r
097bd461	231	DisAsm = (UINT8 *)(UINTN)SystemContext.SystemContextArm->PC;\r
f3198cba	232	ItBlock = 0;\r
f3198cba	233	DisassembleInstruction (&DisAsm, (SystemContext.SystemContextArm->CPSR & BIT5) == BIT5, TRUE, &ItBlock, Buffer, sizeof (Buffer));\r
097bd461	234	DEBUG ((EFI_D_ERROR, "\n%a", Buffer));\r
3402aac7	235	\r
d629c283	236	switch (ExceptionType) {\r
	237	case EXCEPT_ARM_UNDEFINED_INSTRUCTION:\r
	238	case EXCEPT_ARM_SOFTWARE_INTERRUPT:\r
	239	case EXCEPT_ARM_PREFETCH_ABORT:\r
	240	case EXCEPT_ARM_DATA_ABORT:\r
	241	// advance PC past the faulting instruction\r
	242	PcAdjust = (UINTN)DisAsm - SystemContext.SystemContextArm->PC;\r
	243	break;\r
3402aac7	244	\r
d629c283	245	default:\r
	246	break;\r
	247	}\r
097bd461	248	\r
6f72e28d	249	}\r
	250	DEBUG_CODE_END ();\r
	251	DEBUG ((EFI_D_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));\r
	252	DEBUG ((EFI_D_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));\r
	253	DEBUG ((EFI_D_ERROR, " R8 0x%08x R9 0x%08x R10 0x%08x R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));\r
	254	DEBUG ((EFI_D_ERROR, " R12 0x%08x SP 0x%08x LR 0x%08x PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));\r
d5b0f232	255	DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));\r
	256	\r
	257	// Bit10 is Status[4] Bit3:0 is Status[3:0]\r
	258	DfsrStatus = (SystemContext.SystemContextArm->DFSR & 0xf) \| ((SystemContext.SystemContextArm->DFSR >> 6) & 0x10);\r
	259	DfsrWrite = (SystemContext.SystemContextArm->DFSR & BIT11) != 0;\r
	260	if (DfsrStatus != 0x00) {\r
	261	DEBUG ((EFI_D_ERROR, " %a: %a 0x%08x\n", FaultStatusToString (DfsrStatus), DfsrWrite ? "write to" : "read from", SystemContext.SystemContextArm->DFAR));\r
	262	}\r
65e27445	263	\r
	264	IfsrStatus = (SystemContext.SystemContextArm->IFSR & 0xf) \| ((SystemContext.SystemContextArm->IFSR >> 6) & 0x10);\r
	265	if (IfsrStatus != 0) {\r
	266	DEBUG ((EFI_D_ERROR, " Instruction %a at 0x%08x\n", FaultStatusToString (SystemContext.SystemContextArm->IFSR & 0xf), SystemContext.SystemContextArm->IFAR));\r
d5b0f232	267	}\r
6f72e28d	268	\r
d5b0f232	269	DEBUG ((EFI_D_ERROR, "\n"));\r
6f72e28d	270	ASSERT (FALSE);\r
3402aac7	271	\r
5c8bc8be AB	272	CpuDeadLoop (); // may return if executing under a debugger\r
5c8bc8be AB	273	\r
bb02cb80	274	// Clear the error registers that we have already displayed incase some one wants to keep going\r
	275	SystemContext.SystemContextArm->DFSR = 0;\r
	276	SystemContext.SystemContextArm->IFSR = 0;\r
	277	\r
3402aac7	278	// If some one is stepping past the exception handler adjust the PC to point to the next instruction\r
d629c283	279	SystemContext.SystemContextArm->PC += PcAdjust;\r
6f72e28d	280	}\r