projects / mirror_edk2.git / blame
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1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
| 4 | Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials\r | |
| 7 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | \r | |
| 16 | #ifndef _PCI_ROOT_BRIDGE_H_\r | |
| 17 | #define _PCI_ROOT_BRIDGE_H_\r | |
| 18 | \r | |
| 19 | #include <PiDxe.h>\r | |
| 20 | \r | |
| 21 | #include <Library/BaseLib.h>\r | |
| 22 | #include <Library/BaseMemoryLib.h>\r | |
| 23 | #include <Library/DxeServicesTableLib.h>\r | |
| 24 | #include <Library/IoLib.h>\r | |
| 25 | #include <Library/MemoryAllocationLib.h>\r | |
| 26 | #include <Library/PciLib.h>\r | |
| 27 | #include <Library/UefiLib.h>\r | |
| 28 | #include <Library/DmaLib.h>\r | |
| 29 | \r | |
| 30 | #include <Protocol/EmbeddedExternalDevice.h>\r | |
| 31 | #include <Protocol/DevicePath.h>\r | |
| 32 | #include <Protocol/PciIo.h>\r | |
| 33 | #include <Protocol/PciRootBridgeIo.h>\r | |
| 34 | #include <Protocol/PciHostBridgeResourceAllocation.h>\r | |
| 35 | \r | |
| 36 | #include <IndustryStandard/Pci23.h>\r | |
| 37 | \r | |
| 38 | #include "ArmJunoDxeInternal.h"\r | |
| 39 | \r | |
| 40 | #define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL\r | |
| 41 | #define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL\r | |
| 42 | #define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r | |
| 43 | \r | |
| 44 | \r | |
| 45 | typedef struct {\r | |
| 46 | ACPI_HID_DEVICE_PATH AcpiDevicePath;\r | |
| 47 | EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r | |
| 48 | } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;\r | |
| 49 | \r | |
| 50 | \r | |
| 51 | #define ACPI_CONFIG_IO 0\r | |
| 52 | #define ACPI_CONFIG_MMIO 1\r | |
| 53 | #define ACPI_CONFIG_BUS 2\r | |
| 54 | \r | |
| 55 | typedef struct {\r | |
| 56 | EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3];\r | |
| 57 | EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;\r | |
| 58 | } ACPI_CONFIG_INFO;\r | |
| 59 | \r | |
| 60 | \r | |
| 61 | #define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F')\r | |
| 62 | \r | |
| 63 | typedef struct {\r | |
| 64 | UINT32 Signature;\r | |
| 65 | EFI_HANDLE Handle;\r | |
| 66 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;\r | |
| 67 | EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;\r | |
| 68 | \r | |
| 69 | UINT8 StartBus;\r | |
| 70 | UINT8 EndBus;\r | |
| 71 | UINT16 Type;\r | |
| 72 | UINT32 MemoryStart;\r | |
| 73 | UINT32 MemorySize;\r | |
| 74 | UINTN IoOffset;\r | |
| 75 | UINT32 IoStart;\r | |
| 76 | UINT32 IoSize;\r | |
| 77 | UINT64 PciAttributes;\r | |
| 78 | \r | |
| 79 | ACPI_CONFIG_INFO *Config;\r | |
| 80 | \r | |
| 81 | } PCI_ROOT_BRIDGE;\r | |
| 82 | \r | |
| 83 | \r | |
| 84 | #define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, Io, PCI_ROOT_BRIDGE_SIGNATURE)\r | |
| 85 | \r | |
| 86 | \r | |
| 87 | typedef union {\r | |
| 88 | UINT8 volatile *Buffer;\r | |
| 89 | UINT8 volatile *Ui8;\r | |
| 90 | UINT16 volatile *Ui16;\r | |
| 91 | UINT32 volatile *Ui32;\r | |
| 92 | UINT64 volatile *Ui64;\r | |
| 93 | UINTN volatile Ui;\r | |
| 94 | } PTR;\r | |
| 95 | \r | |
| 96 | \r | |
| 97 | \r | |
| 98 | EFI_STATUS\r | |
| 99 | EFIAPI\r | |
| 100 | PciRootBridgeIoPollMem (\r | |
| 101 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 102 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 103 | IN UINT64 Address,\r | |
| 104 | IN UINT64 Mask,\r | |
| 105 | IN UINT64 Value,\r | |
| 106 | IN UINT64 Delay,\r | |
| 107 | OUT UINT64 *Result\r | |
| 108 | );\r | |
| 109 | \r | |
| 110 | EFI_STATUS\r | |
| 111 | EFIAPI\r | |
| 112 | PciRootBridgeIoPollIo (\r | |
| 113 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 114 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 115 | IN UINT64 Address,\r | |
| 116 | IN UINT64 Mask,\r | |
| 117 | IN UINT64 Value,\r | |
| 118 | IN UINT64 Delay,\r | |
| 119 | OUT UINT64 *Result\r | |
| 120 | );\r | |
| 121 | \r | |
| 122 | EFI_STATUS\r | |
| 123 | EFIAPI\r | |
| 124 | PciRootBridgeIoMemRead (\r | |
| 125 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 126 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 127 | IN UINT64 Address,\r | |
| 128 | IN UINTN Count,\r | |
| 129 | IN OUT VOID *Buffer\r | |
| 130 | );\r | |
| 131 | \r | |
| 132 | EFI_STATUS\r | |
| 133 | EFIAPI\r | |
| 134 | PciRootBridgeIoMemWrite (\r | |
| 135 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 136 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 137 | IN UINT64 Address,\r | |
| 138 | IN UINTN Count,\r | |
| 139 | IN OUT VOID *Buffer\r | |
| 140 | );\r | |
| 141 | \r | |
| 142 | EFI_STATUS\r | |
| 143 | EFIAPI\r | |
| 144 | PciRootBridgeIoIoRead (\r | |
| 145 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 146 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 147 | IN UINT64 UserAddress,\r | |
| 148 | IN UINTN Count,\r | |
| 149 | IN OUT VOID *UserBuffer\r | |
| 150 | );\r | |
| 151 | \r | |
| 152 | EFI_STATUS\r | |
| 153 | EFIAPI\r | |
| 154 | PciRootBridgeIoIoWrite (\r | |
| 155 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 156 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 157 | IN UINT64 UserAddress,\r | |
| 158 | IN UINTN Count,\r | |
| 159 | IN OUT VOID *UserBuffer\r | |
| 160 | );\r | |
| 161 | \r | |
| 162 | EFI_STATUS\r | |
| 163 | EFIAPI\r | |
| 164 | PciRootBridgeIoCopyMem (\r | |
| 165 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 166 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 167 | IN UINT64 DestAddress,\r | |
| 168 | IN UINT64 SrcAddress,\r | |
| 169 | IN UINTN Count\r | |
| 170 | );\r | |
| 171 | \r | |
| 172 | EFI_STATUS\r | |
| 173 | EFIAPI\r | |
| 174 | PciRootBridgeIoPciRead (\r | |
| 175 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 176 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 177 | IN UINT64 Address,\r | |
| 178 | IN UINTN Count,\r | |
| 179 | IN OUT VOID *Buffer\r | |
| 180 | );\r | |
| 181 | \r | |
| 182 | EFI_STATUS\r | |
| 183 | EFIAPI\r | |
| 184 | PciRootBridgeIoPciWrite (\r | |
| 185 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 186 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 187 | IN UINT64 Address,\r | |
| 188 | IN UINTN Count,\r | |
| 189 | IN OUT VOID *Buffer\r | |
| 190 | );\r | |
| 191 | \r | |
| 192 | EFI_STATUS\r | |
| 193 | EFIAPI\r | |
| 194 | PciRootBridgeIoMap (\r | |
| 195 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 196 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,\r | |
| 197 | IN VOID *HostAddress,\r | |
| 198 | IN OUT UINTN *NumberOfBytes,\r | |
| 199 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
| 200 | OUT VOID **Mapping\r | |
| 201 | );\r | |
| 202 | \r | |
| 203 | EFI_STATUS\r | |
| 204 | EFIAPI\r | |
| 205 | PciRootBridgeIoUnmap (\r | |
| 206 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 207 | IN VOID *Mapping\r | |
| 208 | );\r | |
| 209 | \r | |
| 210 | EFI_STATUS\r | |
| 211 | EFIAPI\r | |
| 212 | PciRootBridgeIoAllocateBuffer (\r | |
| 213 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 214 | IN EFI_ALLOCATE_TYPE Type,\r | |
| 215 | IN EFI_MEMORY_TYPE MemoryType,\r | |
| 216 | IN UINTN Pages,\r | |
| 217 | OUT VOID **HostAddress,\r | |
| 218 | IN UINT64 Attributes\r | |
| 219 | );\r | |
| 220 | \r | |
| 221 | EFI_STATUS\r | |
| 222 | EFIAPI\r | |
| 223 | PciRootBridgeIoFreeBuffer (\r | |
| 224 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 225 | IN UINTN Pages,\r | |
| 226 | OUT VOID *HostAddress\r | |
| 227 | );\r | |
| 228 | \r | |
| 229 | EFI_STATUS\r | |
| 230 | EFIAPI\r | |
| 231 | PciRootBridgeIoFlush (\r | |
| 232 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r | |
| 233 | );\r | |
| 234 | \r | |
| 235 | EFI_STATUS\r | |
| 236 | EFIAPI\r | |
| 237 | PciRootBridgeIoGetAttributes (\r | |
| 238 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 239 | OUT UINT64 *Supported,\r | |
| 240 | OUT UINT64 *Attributes\r | |
| 241 | );\r | |
| 242 | \r | |
| 243 | EFI_STATUS\r | |
| 244 | EFIAPI\r | |
| 245 | PciRootBridgeIoSetAttributes (\r | |
| 246 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 247 | IN UINT64 Attributes,\r | |
| 248 | IN OUT UINT64 *ResourceBase,\r | |
| 249 | IN OUT UINT64 *ResourceLength\r | |
| 250 | );\r | |
| 251 | \r | |
| 252 | EFI_STATUS\r | |
| 253 | EFIAPI\r | |
| 254 | PciRootBridgeIoConfiguration (\r | |
| 255 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
| 256 | OUT VOID **Resources\r | |
| 257 | );\r | |
| 258 | \r | |
| 259 | //\r | |
| 260 | // Private Function Prototypes\r | |
| 261 | //\r | |
| 262 | EFI_STATUS\r | |
| 263 | EFIAPI\r | |
| 264 | PciRootBridgeIoMemRW (\r | |
| 265 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
| 266 | IN UINTN Count,\r | |
| 267 | IN BOOLEAN InStrideFlag,\r | |
| 268 | IN PTR In,\r | |
| 269 | IN BOOLEAN OutStrideFlag,\r | |
| 270 | OUT PTR Out\r | |
| 271 | );\r | |
| 272 | \r | |
| 273 | BOOLEAN\r | |
| 274 | PciIoMemAddressValid (\r | |
| 275 | IN EFI_PCI_IO_PROTOCOL *This,\r | |
| 276 | IN UINT64 Address\r | |
| 277 | );\r | |
| 278 | \r | |
| 279 | EFI_STATUS\r | |
| 280 | EmulatePciIoForEhci (\r | |
| 281 | INTN MvPciIfMaxIf\r | |
| 282 | );\r | |
| 283 | \r | |
| 284 | #endif\r |