projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9f38945f OM |
1 | /** @file\r |
| 2 | *\r | |
| 3 | * Copyright (c) 2013-2014, ARM Limited. All rights reserved.\r | |
| 4 | *\r | |
| 5 | * This program and the accompanying materials\r | |
| 6 | * are licensed and made available under the terms and conditions of the BSD\r | |
| 7 | * License which accompanies this distribution. The full text of the license\r | |
| 8 | * may be found at http://opensource.org/licenses/bsd-license.php\r | |
| 9 | *\r | |
| 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | *\r | |
| 13 | **/\r | |
| 14 | #ifndef __GENERIC_WATCHDOG_H__\r | |
| 15 | #define __GENERIC_WATCHDOG_H__\r | |
| 16 | \r | |
| 17 | // Refresh Frame:\r | |
| 18 | #define GENERIC_WDOG_REFRESH_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogRefreshBase) + 0x000)\r | |
| 19 | \r | |
| 20 | // Control Frame:\r | |
| 21 | #define GENERIC_WDOG_CONTROL_STATUS_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x000)\r | |
| 22 | #define GENERIC_WDOG_OFFSET_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x008)\r | |
| 23 | #define GENERIC_WDOG_COMPARE_VALUE_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x010)\r | |
| 24 | \r | |
| 25 | // Values of bit 0 of the Control/Status Register\r | |
| 26 | #define GENERIC_WDOG_ENABLED 1\r | |
| 27 | #define GENERIC_WDOG_DISABLED 0\r | |
| 28 | \r | |
| 29 | #endif // __GENERIC_WATCHDOG_H__\r |