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ArmPlatformPkg/ArmRealViewEbPkg: Added MMC support
[mirror_edk2.git] / ArmPlatformPkg / ArmRealViewEbPkg / ArmRealViewEb-RTSM-MPCore.fdf
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9e2e89f0 1# FLASH layout file for ARM RealView EB.\r
1e57a462 2#\r
b0824968 3# Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
1e57a462 4# \r
5# This program and the accompanying materials \r
6# are licensed and made available under the terms and conditions of the BSD License \r
7# which accompanies this distribution. The full text of the license may be found at \r
8# http://opensource.org/licenses/bsd-license.php \r
9#\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12#\r
13\r
14################################################################################\r
15#\r
16# FD Section\r
17# The [FD] Section is made up of the definition statements and a\r
18# description of what goes into the Flash Device Image. Each FD section\r
19# defines one flash "device" image. A flash device image may be one of\r
20# the following: Removable media bootable image (like a boot floppy\r
21# image,) an Option ROM image (that would be "flashed" into an add-in\r
22# card,) a System "Flash" image (that would be burned into a system's\r
23# flash) or an Update ("Capsule") image that will be used to update and\r
24# existing system flash.\r
25#\r
26################################################################################\r
27\r
28\r
29[FD.ArmRealViewEb_EFI]\r
30BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdFdBaseAddress\r
55b0a24a 31Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize\r
1e57a462 32ErasePolarity = 1\r
33BlockSize = 0x00010000\r
55b0a24a 34NumBlocks = 0x20\r
1e57a462 35\r
36################################################################################\r
37#\r
38# Following are lists of FD Region layout which correspond to the locations of different\r
39# images within the flash device.\r
40#\r
41# Regions must be defined in ascending order and may not overlap.\r
42#\r
43# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
44# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
45# "0x" characters. Like:\r
46# Offset|Size\r
47# PcdOffsetCName|PcdSizeCName\r
48# RegionType <FV, DATA, or FILE>\r
49#\r
50################################################################################\r
51\r
520x00000000|0x00050000\r
53gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
54FV = FVMAIN_SEC\r
55\r
55b0a24a 560x00050000|0x00150000\r
1e57a462 57gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
58FV = FVMAIN_COMPACT\r
59\r
60################################################################################\r
61#\r
62# FV Section\r
63#\r
64# [FV] section is used to define what components or modules are placed within a flash\r
65# device file. This section also defines order the components and modules are positioned\r
66# within the image. The [FV] section consists of define statements, set statements and\r
67# module statements.\r
68#\r
69################################################################################\r
70\r
71[FV.FVMAIN_SEC]\r
72FvAlignment = 8\r
73ERASE_POLARITY = 1\r
74MEMORY_MAPPED = TRUE\r
75STICKY_WRITE = TRUE\r
76LOCK_CAP = TRUE\r
77LOCK_STATUS = TRUE\r
78WRITE_DISABLED_CAP = TRUE\r
79WRITE_ENABLED_CAP = TRUE\r
80WRITE_STATUS = TRUE\r
81WRITE_LOCK_CAP = TRUE\r
82WRITE_LOCK_STATUS = TRUE\r
83READ_DISABLED_CAP = TRUE\r
84READ_ENABLED_CAP = TRUE\r
85READ_STATUS = TRUE\r
86READ_LOCK_CAP = TRUE\r
87READ_LOCK_STATUS = TRUE\r
88\r
89 INF ArmPlatformPkg/Sec/Sec.inf\r
90\r
91\r
92[FV.FvMain]\r
93BlockSize = 0x40\r
94NumBlocks = 0 # This FV gets compressed so make it just big enough\r
95FvAlignment = 8 # FV alignment and FV attributes setting.\r
96ERASE_POLARITY = 1\r
97MEMORY_MAPPED = TRUE\r
98STICKY_WRITE = TRUE\r
99LOCK_CAP = TRUE\r
100LOCK_STATUS = TRUE\r
101WRITE_DISABLED_CAP = TRUE\r
102WRITE_ENABLED_CAP = TRUE\r
103WRITE_STATUS = TRUE\r
104WRITE_LOCK_CAP = TRUE\r
105WRITE_LOCK_STATUS = TRUE\r
106READ_DISABLED_CAP = TRUE\r
107READ_ENABLED_CAP = TRUE\r
108READ_STATUS = TRUE\r
109READ_LOCK_CAP = TRUE\r
110READ_LOCK_STATUS = TRUE\r
111\r
112 INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
113\r
114 #\r
115 # PI DXE Drivers producing Architectural Protocols (EFI Services) \r
116 #\r
117 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
118 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
119 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
120 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
121 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
122 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
123 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
124 INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf\r
125 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
126 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
127 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
128\r
129 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
130 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
131\r
132 #\r
133 # Multiple Console IO support\r
134 #\r
135 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
136 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
137 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
138 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
139 INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
140 \r
017baa1c 141 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
1e57a462 142 INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
143 \r
144 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
145\r
146 #\r
147 # Semi-hosting filesystem\r
148 #\r
149 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
b0824968
OM		 150\r
151 #\r
152 # Multimedia Card Interface\r
153 #\r
154 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
155 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
156\r
1e57a462 157 #\r
158 # FAT filesystem + GPT/MBR partitioning\r
159 #\r
160 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
161 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
162 INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
163 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
164\r
165 #\r
166 # UEFI application (Shell Embedded Boot Loader) \r
167 # \r
168 INF ShellBinPkg/UefiShell/UefiShell.inf \r
169\r
170 #\r
171 # Bds\r
172 #\r
173 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
174 INF ArmPlatformPkg/Bds/Bds.inf\r
175\r
176\r
177[FV.FVMAIN_COMPACT]\r
178FvAlignment = 8\r
179ERASE_POLARITY = 1\r
180MEMORY_MAPPED = TRUE\r
181STICKY_WRITE = TRUE\r
182LOCK_CAP = TRUE\r
183LOCK_STATUS = TRUE\r
184WRITE_DISABLED_CAP = TRUE\r
185WRITE_ENABLED_CAP = TRUE\r
186WRITE_STATUS = TRUE\r
187WRITE_LOCK_CAP = TRUE\r
188WRITE_LOCK_STATUS = TRUE\r
189READ_DISABLED_CAP = TRUE\r
190READ_ENABLED_CAP = TRUE\r
191READ_STATUS = TRUE\r
192READ_LOCK_CAP = TRUE\r
193READ_LOCK_STATUS = TRUE\r
194\r
195!if $(EDK2_SKIP_PEICORE) == 1\r
196 INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
197!else\r
198 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
199 INF MdeModulePkg/Core/Pei/PeiMain.inf\r
200 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
201 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
202 INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
203 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
204 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
205 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
206 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
207!endif\r
208\r
209 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
210 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
211 SECTION FV_IMAGE = FVMAIN\r
212 }\r
213 }\r
214\r
215################################################################################\r
216#\r
217# Rules are use with the [FV] section's module INF type to define\r
218# how an FFS file is created for a given INF file. The following Rule are the default\r
219# rules for the different module type. User can add the customized rules to define the\r
220# content of the FFS file.\r
221#\r
222################################################################################\r
223\r
224\r
225############################################################################\r
226# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # \r
227############################################################################\r
228#\r
229#[Rule.Common.DXE_DRIVER]\r
230# FILE DRIVER = $(NAMED_GUID) {\r
231# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
232# COMPRESS PI_STD {\r
233# GUIDED {\r
234# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
235# UI STRING="$(MODULE_NAME)" Optional\r
236# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
237# }\r
238# }\r
239# }\r
240#\r
241############################################################################\r
242\r
243[Rule.Common.SEC]\r
244 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
245 TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
246 }\r
247\r
248[Rule.Common.PEI_CORE]\r
249 FILE PEI_CORE = $(NAMED_GUID) {\r
250 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
251 UI STRING ="$(MODULE_NAME)" Optional \r
252 }\r
253\r
254[Rule.Common.PEIM]\r
255 FILE PEIM = $(NAMED_GUID) {\r
256 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
257 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
258 UI STRING="$(MODULE_NAME)" Optional \r
259 }\r
260\r
261[Rule.Common.PEIM.TIANOCOMPRESSED]\r
262 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
263 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
264 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
265 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
266 UI STRING="$(MODULE_NAME)" Optional\r
267 }\r
268 }\r
269\r
270[Rule.Common.DXE_CORE]\r
271 FILE DXE_CORE = $(NAMED_GUID) {\r
272 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
273 UI STRING="$(MODULE_NAME)" Optional\r
274 }\r
275\r
276[Rule.Common.UEFI_DRIVER]\r
277 FILE DRIVER = $(NAMED_GUID) {\r
278 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
279 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
280 UI STRING="$(MODULE_NAME)" Optional\r
281 }\r
282\r
283[Rule.Common.DXE_DRIVER]\r
284 FILE DRIVER = $(NAMED_GUID) {\r
285 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
286 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
287 UI STRING="$(MODULE_NAME)" Optional\r
288 }\r
289\r
290[Rule.Common.DXE_RUNTIME_DRIVER]\r
291 FILE DRIVER = $(NAMED_GUID) {\r
292 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
293 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
294 UI STRING="$(MODULE_NAME)" Optional\r
295 }\r
296\r
297[Rule.Common.UEFI_APPLICATION]\r
298 FILE APPLICATION = $(NAMED_GUID) {\r
299 UI STRING ="$(MODULE_NAME)" Optional \r
300 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
301 }\r
302\r
303[Rule.Common.UEFI_DRIVER.BINARY]\r
304 FILE DRIVER = $(NAMED_GUID) {\r
305 DXE_DEPEX DXE_DEPEX Optional |.depex\r
306 PE32 PE32 |.efi\r
307 UI STRING="$(MODULE_NAME)" Optional\r
308 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
309 }\r
310\r
311[Rule.Common.UEFI_APPLICATION.BINARY]\r
312 FILE APPLICATION = $(NAMED_GUID) {\r
313 PE32 PE32 |.efi\r
314 UI STRING="$(MODULE_NAME)" Optional\r
315 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
316 }\r
EFI Development Kit II mirror for PVE