[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-CTA9x4.fdf

#\r
#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
#  \r
#  This program and the accompanying materials                          \r
#  are licensed and made available under the terms and conditions of the BSD License         \r
#  which accompanies this distribution.  The full text of the license may be found at        \r
#  http://opensource.org/licenses/bsd-license.php                                            \r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
#\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
\r
[FD.Sec_ArmVExpress_EFI]\r
BaseAddress   = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress  #The base address of the Secure FLASH Device.\r
Size          = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize         #The size in bytes of the Secure FLASH Device\r
ErasePolarity = 1\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x80\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00080000\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
FV = FVMAIN_SEC\r
\r
\r
[FD.ArmVExpress_EFI]\r
!if $(EDK2_ARMVE_STANDALONE) == 1\r
BaseAddress   = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.\r
!else\r
BaseAddress   = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in remapped DRAM.\r
!endif\r
Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x200\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00200000\r
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
FV = FVMAIN_COMPACT\r
\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
\r
[FV.FVMAIN_SEC]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF ArmPlatformPkg/Sec/Sec.inf\r
\r
\r
[FV.FvMain]\r
BlockSize          = 0x40\r
NumBlocks          = 0         # This FV gets compressed so make it just big enough\r
FvAlignment        = 8         # FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
\r
  #\r
  # PI DXE Drivers producing Architectural Protocols (EFI Services) \r
  #\r
  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  #\r
  # Multiple Console IO support\r
  #\r
  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
\r
  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
  # Platform\r
  #\r
  INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmHwDxe.inf\r
\r
!if $(EDK2_ARMVE_STANDALONE) != 1\r
  #\r
  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r
  #\r
  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
!endif\r
  \r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
  # Versatile Express FileSystem\r
  INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r
\r
  #\r
  # Multimedia Card Interface\r
  #\r
  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r

  #
  # USB support\r
  #\r
  INF EmbeddedPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf
\r
  #\r
  # Android Fastboot\r
  #\r
  INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf\r
  INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf\r
  INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf\r
\r
  #\r
  # UEFI application (Shell Embedded Boot Loader)\r
  #\r
  INF ShellBinPkg/UefiShell/UefiShell.inf\r
\r
  #\r
  # Bds\r
  #\r
  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF ArmPlatformPkg/Bds/Bds.inf\r
\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(EDK2_SKIP_PEICORE) == 1\r
  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
!else\r
  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
  INF MdeModulePkg/Core/Pei/PeiMain.inf\r
  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!endif\r
  \r
  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
      SECTION FV_IMAGE = FVMAIN\r
    }\r
  }\r
\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
\r
\r
############################################################################\r
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # \r
############################################################################\r
#\r
#[Rule.Common.DXE_DRIVER]\r
#  FILE DRIVER = $(NAMED_GUID) {\r
#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
#    COMPRESS PI_STD {\r
#      GUIDED {\r
#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
#        UI       STRING="$(MODULE_NAME)" Optional\r
#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
#      }\r
#    }\r
#  }\r
#\r
############################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI     STRING ="$(MODULE_NAME)" Optional         \r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional         \r
  }\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
      UI        STRING="$(MODULE_NAME)" Optional\r
    }\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI     STRING ="$(MODULE_NAME)" Optional         \r
    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.UEFI_DRIVER.BINARY]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional      |.depex\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.BINARY]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
Commit	Line	Data
66f530ed	1	#\r
94e0955d	2	# Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
66f530ed	3	# \r
	4	# This program and the accompanying materials \r
	5	# are licensed and made available under the terms and conditions of the BSD License \r
	6	# which accompanies this distribution. The full text of the license may be found at \r
	7	# http://opensource.org/licenses/bsd-license.php \r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	#\r
	12	\r
	13	################################################################################\r
	14	#\r
	15	# FD Section\r
	16	# The [FD] Section is made up of the definition statements and a\r
	17	# description of what goes into the Flash Device Image. Each FD section\r
	18	# defines one flash "device" image. A flash device image may be one of\r
	19	# the following: Removable media bootable image (like a boot floppy\r
	20	# image,) an Option ROM image (that would be "flashed" into an add-in\r
	21	# card,) a System "Flash" image (that would be burned into a system's\r
	22	# flash) or an Update ("Capsule") image that will be used to update and\r
	23	# existing system flash.\r
	24	#\r
	25	################################################################################\r
	26	\r
	27	[FD.Sec_ArmVExpress_EFI]\r
	28	BaseAddress = 0x44000000\|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.\r
	29	Size = 0x00080000\|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device\r
	30	ErasePolarity = 1\r
	31	BlockSize = 0x00001000\r
	32	NumBlocks = 0x80\r
	33	\r
	34	################################################################################\r
	35	#\r
	36	# Following are lists of FD Region layout which correspond to the locations of different\r
	37	# images within the flash device.\r
	38	#\r
	39	# Regions must be defined in ascending order and may not overlap.\r
	40	#\r
	41	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	42	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	43	# "0x" characters. Like:\r
	44	# Offset\|Size\r
	45	# PcdOffsetCName\|PcdSizeCName\r
	46	# RegionType <FV, DATA, or FILE>\r
	47	#\r
	48	################################################################################\r
	49	\r
	50	0x00000000\|0x00080000\r
ce5ed6c8	51	gArmTokenSpaceGuid.PcdSecureFvBaseAddress\|gArmTokenSpaceGuid.PcdSecureFvSize\r
66f530ed	52	FV = FVMAIN_SEC\r
	53	\r
	54	\r
	55	[FD.ArmVExpress_EFI]\r
	56	!if $(EDK2_ARMVE_STANDALONE) == 1\r
	57	BaseAddress = 0x45000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r
	58	!else\r
	59	BaseAddress = 0x80000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.\r
	60	!endif\r
	61	Size = 0x00200000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r
	62	ErasePolarity = 1\r
	63	\r
	64	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
	65	BlockSize = 0x00001000\r
	66	NumBlocks = 0x200\r
	67	\r
	68	################################################################################\r
	69	#\r
	70	# Following are lists of FD Region layout which correspond to the locations of different\r
	71	# images within the flash device.\r
	72	#\r
	73	# Regions must be defined in ascending order and may not overlap.\r
	74	#\r
	75	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	76	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	77	# "0x" characters. Like:\r
	78	# Offset\|Size\r
	79	# PcdOffsetCName\|PcdSizeCName\r
	80	# RegionType <FV, DATA, or FILE>\r
	81	#\r
	82	################################################################################\r
	83	\r
	84	0x00000000\|0x00200000\r
ce5ed6c8	85	gArmTokenSpaceGuid.PcdFvBaseAddress\|gArmTokenSpaceGuid.PcdFvSize\r
66f530ed	86	FV = FVMAIN_COMPACT\r
	87	\r
	88	\r
	89	################################################################################\r
	90	#\r
	91	# FV Section\r
	92	#\r
	93	# [FV] section is used to define what components or modules are placed within a flash\r
	94	# device file. This section also defines order the components and modules are positioned\r
	95	# within the image. The [FV] section consists of define statements, set statements and\r
	96	# module statements.\r
	97	#\r
	98	################################################################################\r
	99	\r
	100	[FV.FVMAIN_SEC]\r
	101	FvAlignment = 8\r
	102	ERASE_POLARITY = 1\r
	103	MEMORY_MAPPED = TRUE\r
	104	STICKY_WRITE = TRUE\r
	105	LOCK_CAP = TRUE\r
	106	LOCK_STATUS = TRUE\r
	107	WRITE_DISABLED_CAP = TRUE\r
	108	WRITE_ENABLED_CAP = TRUE\r
	109	WRITE_STATUS = TRUE\r
	110	WRITE_LOCK_CAP = TRUE\r
	111	WRITE_LOCK_STATUS = TRUE\r
	112	READ_DISABLED_CAP = TRUE\r
	113	READ_ENABLED_CAP = TRUE\r
	114	READ_STATUS = TRUE\r
	115	READ_LOCK_CAP = TRUE\r
	116	READ_LOCK_STATUS = TRUE\r
	117	\r
	118	INF ArmPlatformPkg/Sec/Sec.inf\r
	119	\r
	120	\r
	121	[FV.FvMain]\r
	122	BlockSize = 0x40\r
	123	NumBlocks = 0 # This FV gets compressed so make it just big enough\r
	124	FvAlignment = 8 # FV alignment and FV attributes setting.\r
	125	ERASE_POLARITY = 1\r
	126	MEMORY_MAPPED = TRUE\r
	127	STICKY_WRITE = TRUE\r
	128	LOCK_CAP = TRUE\r
	129	LOCK_STATUS = TRUE\r
	130	WRITE_DISABLED_CAP = TRUE\r
	131	WRITE_ENABLED_CAP = TRUE\r
	132	WRITE_STATUS = TRUE\r
	133	WRITE_LOCK_CAP = TRUE\r
	134	WRITE_LOCK_STATUS = TRUE\r
	135	READ_DISABLED_CAP = TRUE\r
	136	READ_ENABLED_CAP = TRUE\r
	137	READ_STATUS = TRUE\r
	138	READ_LOCK_CAP = TRUE\r
	139	READ_LOCK_STATUS = TRUE\r
	140	\r
	141	INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
	142	\r
	143	#\r
	144	# PI DXE Drivers producing Architectural Protocols (EFI Services) \r
	145	#\r
	146	INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
	147	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
	148	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
	149	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
150	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
151	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
152	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
153	INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
154	INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
155	INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
156	\r
157	#\r
158	# Multiple Console IO support\r
159	#\r
160	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
161	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
162	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
163	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
164	INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
165	\r
166	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
167	\r
017baa1c	168	INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
66f530ed	169	INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
	170	INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
	171	INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
	172	INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
	173	\r
	174	#\r
a4ab7df4 OM	175	# Platform\r
	176	#\r
	177	INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmHwDxe.inf\r
66f530ed	178	\r
	179	!if $(EDK2_ARMVE_STANDALONE) != 1\r
	180	#\r
	181	# Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r
	182	#\r
	183	INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
	184	!endif\r
	185	\r
	186	#\r
	187	# FAT filesystem + GPT/MBR partitioning\r
	188	#\r
	189	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	190	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
e1772adf	191	INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
66f530ed	192	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
66f530ed	193	\r
94e0955d OM	194	# Versatile Express FileSystem\r
	195	INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r
	196	\r
66f530ed	197	#\r
	198	# Multimedia Card Interface\r
	199	#\r
	200	INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
	201	INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
4257aa4d OM	202
	203	#
	204	# USB support\r
	205	#\r
	206	INF EmbeddedPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf
	207	\r
81f29156 OM	208	#\r
	209	# Android Fastboot\r
	210	#\r
	211	INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf\r
	212	INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf\r
	213	INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf\r
	214	\r
66f530ed	215	#\r
4257aa4d OM	216	# UEFI application (Shell Embedded Boot Loader)\r
	217	#\r
	218	INF ShellBinPkg/UefiShell/UefiShell.inf\r
	219	\r
66f530ed	220	#\r
	221	# Bds\r
	222	#\r
	223	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	224	INF ArmPlatformPkg/Bds/Bds.inf\r
	225	\r
	226	\r
	227	[FV.FVMAIN_COMPACT]\r
	228	FvAlignment = 8\r
	229	ERASE_POLARITY = 1\r
	230	MEMORY_MAPPED = TRUE\r
	231	STICKY_WRITE = TRUE\r
	232	LOCK_CAP = TRUE\r
	233	LOCK_STATUS = TRUE\r
	234	WRITE_DISABLED_CAP = TRUE\r
	235	WRITE_ENABLED_CAP = TRUE\r
	236	WRITE_STATUS = TRUE\r
	237	WRITE_LOCK_CAP = TRUE\r
	238	WRITE_LOCK_STATUS = TRUE\r
	239	READ_DISABLED_CAP = TRUE\r
	240	READ_ENABLED_CAP = TRUE\r
	241	READ_STATUS = TRUE\r
	242	READ_LOCK_CAP = TRUE\r
	243	READ_LOCK_STATUS = TRUE\r
	244	\r
	245	!if $(EDK2_SKIP_PEICORE) == 1\r
	246	INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
	247	!else\r
	248	INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
	249	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
	250	INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
	251	INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
	252	INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
	253	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	254	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	255	INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
	256	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
	257	!endif\r
	258	\r
	259	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
	260	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
	261	SECTION FV_IMAGE = FVMAIN\r
	262	}\r
	263	}\r
	264	\r
	265	\r
	266	################################################################################\r
	267	#\r
	268	# Rules are use with the [FV] section's module INF type to define\r
	269	# how an FFS file is created for a given INF file. The following Rule are the default\r
	270	# rules for the different module type. User can add the customized rules to define the\r
	271	# content of the FFS file.\r
	272	#\r
	273	################################################################################\r
	274	\r
	275	\r
	276	############################################################################\r
	277	# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # \r
	278	############################################################################\r
	279	#\r
	280	#[Rule.Common.DXE_DRIVER]\r
	281	# FILE DRIVER = $(NAMED_GUID) {\r
	282	# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	283	# COMPRESS PI_STD {\r
284	# GUIDED {\r
285	# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
286	# UI STRING="$(MODULE_NAME)" Optional\r
287	# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
288	# }\r
289	# }\r
290	# }\r
291	#\r
292	############################################################################\r
293	\r
294	[Rule.Common.SEC]\r
295	FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
296	TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
297	}\r
298	\r
299	[Rule.Common.PEI_CORE]\r
300	FILE PEI_CORE = $(NAMED_GUID) {\r
301	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
302	UI STRING ="$(MODULE_NAME)" Optional \r
303	}\r
304	\r
305	[Rule.Common.PEIM]\r
306	FILE PEIM = $(NAMED_GUID) {\r
307	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
308	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
309	UI STRING="$(MODULE_NAME)" Optional \r
310	}\r
311	\r
312	[Rule.Common.PEIM.TIANOCOMPRESSED]\r
313	FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
314	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
315	GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
316	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
317	UI STRING="$(MODULE_NAME)" Optional\r
318	}\r
319	}\r
320	\r
321	[Rule.Common.DXE_CORE]\r
322	FILE DXE_CORE = $(NAMED_GUID) {\r
323	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
324	UI STRING="$(MODULE_NAME)" Optional\r
325	}\r
326	\r
327	[Rule.Common.UEFI_DRIVER]\r
328	FILE DRIVER = $(NAMED_GUID) {\r
329	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
330	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
331	UI STRING="$(MODULE_NAME)" Optional\r
332	}\r
333	\r
334	[Rule.Common.DXE_DRIVER]\r
335	FILE DRIVER = $(NAMED_GUID) {\r
336	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
337	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
338	UI STRING="$(MODULE_NAME)" Optional\r
339	}\r
340	\r
341	[Rule.Common.DXE_RUNTIME_DRIVER]\r
342	FILE DRIVER = $(NAMED_GUID) {\r
343	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
344	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
345	UI STRING="$(MODULE_NAME)" Optional\r
346	}\r
347	\r
348	[Rule.Common.UEFI_APPLICATION]\r
349	FILE APPLICATION = $(NAMED_GUID) {\r
350	UI STRING ="$(MODULE_NAME)" Optional \r
351	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
352	}\r
e1772adf	353	\r
	354	[Rule.Common.UEFI_DRIVER.BINARY]\r
	355	FILE DRIVER = $(NAMED_GUID) {\r
	356	DXE_DEPEX DXE_DEPEX Optional \|.depex\r
	357	PE32 PE32 \|.efi\r
	358	UI STRING="$(MODULE_NAME)" Optional\r
	359	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	360	}\r
	361	\r
	362	[Rule.Common.UEFI_APPLICATION.BINARY]\r
	363	FILE APPLICATION = $(NAMED_GUID) {\r
	364	PE32 PE32 \|.efi\r
	365	UI STRING="$(MODULE_NAME)" Optional\r
	366	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	367	}\r