[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-CTA9x4.fdf

# FLASH layout file for ARM VE.\r
#\r
#  Copyright (c) 2011, ARM Limited. All rights reserved.\r
#  \r
#  This program and the accompanying materials                          \r
#  are licensed and made available under the terms and conditions of the BSD License         \r
#  which accompanies this distribution.  The full text of the license may be found at        \r
#  http://opensource.org/licenses/bsd-license.php                                            \r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
#\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
\r
[FD.Sec_ArmVExpress_EFI]\r
BaseAddress   = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress  #The base address of the Secure FLASH Device.\r
Size          = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize         #The size in bytes of the Secure FLASH Device\r
ErasePolarity = 1\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x80\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00080000\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize\r
FV = FVMAIN_SEC\r
\r
\r
[FD.ArmVExpress_EFI]\r
!if $(EDK2_ARMVE_STANDALONE) == 1\r
BaseAddress   = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.\r
!else\r
BaseAddress   = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in remapped DRAM.\r
!endif\r
Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x200\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00200000\r
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize\r
FV = FVMAIN_COMPACT\r
\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
\r
[FV.FVMAIN_SEC]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF ArmPlatformPkg/Sec/Sec.inf\r
\r
\r
[FV.FvMain]\r
BlockSize          = 0x40\r
NumBlocks          = 0         # This FV gets compressed so make it just big enough\r
FvAlignment        = 8         # FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
\r
  #\r
  # PI DXE Drivers producing Architectural Protocols (EFI Services) \r
  #\r
  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  #\r
  # Multiple Console IO support\r
  #\r
  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
\r
  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
\r
!if $(EDK2_ARMVE_STANDALONE) != 1\r
  #\r
  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r
  #\r
  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
!endif\r
  \r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  INF FatPkg/EnhancedFatDxe/Fat.inf\r
  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
  #\r
  # Multimedia Card Interface\r
  #\r
  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
  \r
  #\r
  # UEFI application (Shell Embedded Boot Loader) \r
  #  \r
  INF EmbeddedPkg/Ebl/Ebl.inf\r
    \r
!if $(EDK2_ARMVE_UEFI2_SHELL) == 1\r
  INF ShellPkg/Application/Shell/Shell.inf\r
!endif\r
  \r
  #\r
  # Bds\r
  #\r
  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF ArmPlatformPkg/Bds/Bds.inf\r
\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(EDK2_SKIP_PEICORE) == 1\r
  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
!else\r
  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
  INF MdeModulePkg/Core/Pei/PeiMain.inf\r
  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!endif\r
  \r
  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
      SECTION FV_IMAGE = FVMAIN\r
    }\r
  }\r
\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
\r
\r
############################################################################\r
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # \r
############################################################################\r
#\r
#[Rule.Common.DXE_DRIVER]\r
#  FILE DRIVER = $(NAMED_GUID) {\r
#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
#    COMPRESS PI_STD {\r
#      GUIDED {\r
#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
#        UI       STRING="$(MODULE_NAME)" Optional\r
#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
#      }\r
#    }\r
#  }\r
#\r
############################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI     STRING ="$(MODULE_NAME)" Optional         \r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional         \r
  }\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
      UI        STRING="$(MODULE_NAME)" Optional\r
    }\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI     STRING ="$(MODULE_NAME)" Optional         \r
    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
Commit	Line	Data
66f530ed	1	# FLASH layout file for ARM VE.\r
	2	#\r
	3	# Copyright (c) 2011, ARM Limited. All rights reserved.\r
	4	# \r
	5	# This program and the accompanying materials \r
	6	# are licensed and made available under the terms and conditions of the BSD License \r
	7	# which accompanies this distribution. The full text of the license may be found at \r
	8	# http://opensource.org/licenses/bsd-license.php \r
	9	#\r
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	12	#\r
	13	\r
	14	################################################################################\r
	15	#\r
	16	# FD Section\r
	17	# The [FD] Section is made up of the definition statements and a\r
	18	# description of what goes into the Flash Device Image. Each FD section\r
	19	# defines one flash "device" image. A flash device image may be one of\r
	20	# the following: Removable media bootable image (like a boot floppy\r
	21	# image,) an Option ROM image (that would be "flashed" into an add-in\r
	22	# card,) a System "Flash" image (that would be burned into a system's\r
	23	# flash) or an Update ("Capsule") image that will be used to update and\r
	24	# existing system flash.\r
	25	#\r
	26	################################################################################\r
	27	\r
	28	[FD.Sec_ArmVExpress_EFI]\r
	29	BaseAddress = 0x44000000\|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.\r
	30	Size = 0x00080000\|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device\r
	31	ErasePolarity = 1\r
	32	BlockSize = 0x00001000\r
	33	NumBlocks = 0x80\r
	34	\r
	35	################################################################################\r
	36	#\r
	37	# Following are lists of FD Region layout which correspond to the locations of different\r
	38	# images within the flash device.\r
	39	#\r
	40	# Regions must be defined in ascending order and may not overlap.\r
	41	#\r
	42	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	43	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	44	# "0x" characters. Like:\r
	45	# Offset\|Size\r
	46	# PcdOffsetCName\|PcdSizeCName\r
	47	# RegionType <FV, DATA, or FILE>\r
	48	#\r
	49	################################################################################\r
	50	\r
	51	0x00000000\|0x00080000\r
	52	gArmTokenSpaceGuid.PcdSecureFvBaseAddress\|gArmTokenSpaceGuid.PcdSecureFvBaseSize\r
	53	FV = FVMAIN_SEC\r
	54	\r
	55	\r
	56	[FD.ArmVExpress_EFI]\r
	57	!if $(EDK2_ARMVE_STANDALONE) == 1\r
	58	BaseAddress = 0x45000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r
	59	!else\r
	60	BaseAddress = 0x80000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.\r
	61	!endif\r
	62	Size = 0x00200000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r
	63	ErasePolarity = 1\r
	64	\r
65	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
66	BlockSize = 0x00001000\r
67	NumBlocks = 0x200\r
68	\r
69	################################################################################\r
70	#\r
71	# Following are lists of FD Region layout which correspond to the locations of different\r
72	# images within the flash device.\r
73	#\r
74	# Regions must be defined in ascending order and may not overlap.\r
75	#\r
76	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
77	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
78	# "0x" characters. Like:\r
79	# Offset\|Size\r
80	# PcdOffsetCName\|PcdSizeCName\r
81	# RegionType <FV, DATA, or FILE>\r
82	#\r
83	################################################################################\r
84	\r
85	0x00000000\|0x00200000\r
86	gArmTokenSpaceGuid.PcdFvBaseAddress\|gArmTokenSpaceGuid.PcdFvBaseSize\r
87	FV = FVMAIN_COMPACT\r
88	\r
89	\r
90	################################################################################\r
91	#\r
92	# FV Section\r
93	#\r
94	# [FV] section is used to define what components or modules are placed within a flash\r
95	# device file. This section also defines order the components and modules are positioned\r
96	# within the image. The [FV] section consists of define statements, set statements and\r
97	# module statements.\r
98	#\r
99	################################################################################\r
100	\r
101	[FV.FVMAIN_SEC]\r
102	FvAlignment = 8\r
103	ERASE_POLARITY = 1\r
104	MEMORY_MAPPED = TRUE\r
105	STICKY_WRITE = TRUE\r
106	LOCK_CAP = TRUE\r
107	LOCK_STATUS = TRUE\r
108	WRITE_DISABLED_CAP = TRUE\r
109	WRITE_ENABLED_CAP = TRUE\r
110	WRITE_STATUS = TRUE\r
111	WRITE_LOCK_CAP = TRUE\r
112	WRITE_LOCK_STATUS = TRUE\r
113	READ_DISABLED_CAP = TRUE\r
114	READ_ENABLED_CAP = TRUE\r
115	READ_STATUS = TRUE\r
116	READ_LOCK_CAP = TRUE\r
117	READ_LOCK_STATUS = TRUE\r
118	\r
119	INF ArmPlatformPkg/Sec/Sec.inf\r
120	\r
121	\r
122	[FV.FvMain]\r
123	BlockSize = 0x40\r
124	NumBlocks = 0 # This FV gets compressed so make it just big enough\r
125	FvAlignment = 8 # FV alignment and FV attributes setting.\r
126	ERASE_POLARITY = 1\r
127	MEMORY_MAPPED = TRUE\r
128	STICKY_WRITE = TRUE\r
129	LOCK_CAP = TRUE\r
130	LOCK_STATUS = TRUE\r
131	WRITE_DISABLED_CAP = TRUE\r
132	WRITE_ENABLED_CAP = TRUE\r
133	WRITE_STATUS = TRUE\r
134	WRITE_LOCK_CAP = TRUE\r
135	WRITE_LOCK_STATUS = TRUE\r
136	READ_DISABLED_CAP = TRUE\r
137	READ_ENABLED_CAP = TRUE\r
138	READ_STATUS = TRUE\r
139	READ_LOCK_CAP = TRUE\r
140	READ_LOCK_STATUS = TRUE\r
141	\r
142	INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
143	\r
144	#\r
145	# PI DXE Drivers producing Architectural Protocols (EFI Services) \r
146	#\r
147	INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
148	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
149	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
150	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
151	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
152	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
153	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
154	INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
155	INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
156	INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
157	\r
158	#\r
159	# Multiple Console IO support\r
160	#\r
161	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
162	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
163	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
164	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
165	INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
166	\r
167	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
168	\r
169	INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf\r
170	INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
171	INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
172	INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
173	INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
174	\r
175	#\r
176	\r
177	!if $(EDK2_ARMVE_STANDALONE) != 1\r
178	#\r
179	# Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r
180	#\r
181	INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
182	!endif\r
183	\r
184	#\r
185	# FAT filesystem + GPT/MBR partitioning\r
186	#\r
187	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
188	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
189	INF FatPkg/EnhancedFatDxe/Fat.inf\r
190	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
191	\r
192	#\r
193	# Multimedia Card Interface\r
194	#\r
195	INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
196	INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
197	\r
198	#\r
199	# UEFI application (Shell Embedded Boot Loader) \r
200	# \r
201	INF EmbeddedPkg/Ebl/Ebl.inf\r
202	\r
203	!if $(EDK2_ARMVE_UEFI2_SHELL) == 1\r
204	INF ShellPkg/Application/Shell/Shell.inf\r
205	!endif\r
206	\r
207	#\r
208	# Bds\r
209	#\r
210	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
211	INF ArmPlatformPkg/Bds/Bds.inf\r
212	\r
213	\r
214	[FV.FVMAIN_COMPACT]\r
215	FvAlignment = 8\r
216	ERASE_POLARITY = 1\r
217	MEMORY_MAPPED = TRUE\r
218	STICKY_WRITE = TRUE\r
219	LOCK_CAP = TRUE\r
220	LOCK_STATUS = TRUE\r
221	WRITE_DISABLED_CAP = TRUE\r
222	WRITE_ENABLED_CAP = TRUE\r
223	WRITE_STATUS = TRUE\r
224	WRITE_LOCK_CAP = TRUE\r
225	WRITE_LOCK_STATUS = TRUE\r
226	READ_DISABLED_CAP = TRUE\r
227	READ_ENABLED_CAP = TRUE\r
228	READ_STATUS = TRUE\r
229	READ_LOCK_CAP = TRUE\r
230	READ_LOCK_STATUS = TRUE\r
231	\r
232	!if $(EDK2_SKIP_PEICORE) == 1\r
233	INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
234	!else\r
235	INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
236	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
237	INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
238	INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
239	INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
240	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
241	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
242	INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
243	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
244	!endif\r
245	\r
246	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
247	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
248	SECTION FV_IMAGE = FVMAIN\r
249	}\r
250	}\r
251	\r
252	\r
253	################################################################################\r
254	#\r
255	# Rules are use with the [FV] section's module INF type to define\r
256	# how an FFS file is created for a given INF file. The following Rule are the default\r
257	# rules for the different module type. User can add the customized rules to define the\r
258	# content of the FFS file.\r
259	#\r
260	################################################################################\r
261	\r
262	\r
263	############################################################################\r
264	# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # \r
265	############################################################################\r
266	#\r
267	#[Rule.Common.DXE_DRIVER]\r
268	# FILE DRIVER = $(NAMED_GUID) {\r
269	# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
270	# COMPRESS PI_STD {\r
271	# GUIDED {\r
272	# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
273	# UI STRING="$(MODULE_NAME)" Optional\r
274	# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
275	# }\r
276	# }\r
277	# }\r
278	#\r
279	############################################################################\r
280	\r
281	[Rule.Common.SEC]\r
282	FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
283	TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
284	}\r
285	\r
286	[Rule.Common.PEI_CORE]\r
287	FILE PEI_CORE = $(NAMED_GUID) {\r
288	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
289	UI STRING ="$(MODULE_NAME)" Optional \r
290	}\r
291	\r
292	[Rule.Common.PEIM]\r
293	FILE PEIM = $(NAMED_GUID) {\r
294	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
295	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
296	UI STRING="$(MODULE_NAME)" Optional \r
297	}\r
298	\r
299	[Rule.Common.PEIM.TIANOCOMPRESSED]\r
300	FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
301	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
302	GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
303	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
304	UI STRING="$(MODULE_NAME)" Optional\r
305	}\r
306	}\r
307	\r
308	[Rule.Common.DXE_CORE]\r
309	FILE DXE_CORE = $(NAMED_GUID) {\r
310	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
311	UI STRING="$(MODULE_NAME)" Optional\r
312	}\r
313	\r
314	[Rule.Common.UEFI_DRIVER]\r
315	FILE DRIVER = $(NAMED_GUID) {\r
316	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
317	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
318	UI STRING="$(MODULE_NAME)" Optional\r
319	}\r
320	\r
321	[Rule.Common.DXE_DRIVER]\r
322	FILE DRIVER = $(NAMED_GUID) {\r
323	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
324	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
325	UI STRING="$(MODULE_NAME)" Optional\r
326	}\r
327	\r
328	[Rule.Common.DXE_RUNTIME_DRIVER]\r
329	FILE DRIVER = $(NAMED_GUID) {\r
330	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
331	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
332	UI STRING="$(MODULE_NAME)" Optional\r
333	}\r
334	\r
335	[Rule.Common.UEFI_APPLICATION]\r
336	FILE APPLICATION = $(NAMED_GUID) {\r
337	UI STRING ="$(MODULE_NAME)" Optional \r
338	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
339	}\r