[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-FVP-AArch64.dsc

#\r
#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
#  Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
#  This program and the accompanying materials\r
#  are licensed and made available under the terms and conditions of the BSD License\r
#  which accompanies this distribution.  The full text of the license may be found at\r
#  http://opensource.org/licenses/bsd-license.php\r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
#\r
\r
################################################################################\r
#\r
# Defines Section - statements that will be processed to create a Makefile.\r
#\r
################################################################################\r
[Defines]\r
  PLATFORM_NAME                  = ArmVExpress-FVP-AArch64\r
  PLATFORM_GUID                  = 0de70077-9b3b-43bf-ba38-0ea37d77141b\r
  PLATFORM_VERSION               = 0.1\r
  DSC_SPECIFICATION              = 0x00010005\r
  OUTPUT_DIRECTORY               = Build/ArmVExpress-FVP-AArch64\r
  SUPPORTED_ARCHITECTURES        = AARCH64\r
  BUILD_TARGETS                  = DEBUG|RELEASE\r
  SKUID_IDENTIFIER               = DEFAULT\r
  FLASH_DEFINITION               = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf\r
\r
!ifndef ARM_FVP_RUN_NORFLASH\r
  DEFINE EDK2_SKIP_PEICORE=1\r
!endif\r
\r
\r
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc\r
\r
[LibraryClasses.common]\r
  ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf\r
  ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf\r
  ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf\r
\r
  ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf\r
  NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf\r
  LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf\r
\r
  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf\r
\r
  # Virtio Support\r
  VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf\r
  VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf\r
\r
[LibraryClasses.common.SEC]\r
  ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf\r
  ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf\r
  ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf\r
\r
[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]\r
  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
\r
[BuildOptions]\r
  GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM\r
\r
\r
################################################################################\r
#\r
# Pcd Section - list of all EDK II PCD Entries defined by this Platform\r
#\r
################################################################################\r
\r
[PcdsFeatureFlag.common]\r
\r
  ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.\r
  #  It could be set FALSE to save size.\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE\r
\r
  # Force the UEFI GIC driver to use GICv2 legacy mode. To use\r
  # GICv3 without GICv2 legacy in UEFI, the ARM Trusted Firmware needs\r
  # to configure the Non-Secure interrupts in the GIC Redistributors\r
  # which is not supported at the moment.\r
  gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|TRUE\r
\r
[PcdsFixedAtBuild.common]\r
  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Fixed Virtual Platform"\r
  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ARM-FVP"\r
\r
  # Up to 8 cores on Base models. This works fine if model happens to have less.\r
  gArmPlatformTokenSpaceGuid.PcdCoreCount|8\r
  gArmPlatformTokenSpaceGuid.PcdClusterCount|2\r
\r
  #\r
  # NV Storage PCDs. Use base of 0x0C000000 for NOR1\r
  #\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000\r
\r
  gArmTokenSpaceGuid.PcdVFPEnabled|1\r
\r
  # FVP models can have 2 clusters with 4 cpus each\r
  # Stacks for MPCores in Secure World\r
  # Trusted SRAM (DRAM on Foundation model)\r
  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x04000000\r
  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000\r
  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800\r
\r
  # Stacks for MPCores in Normal World\r
  # Non-Trusted SRAM\r
  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000\r
  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000\r
  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000\r
\r
  # System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)\r
  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000\r
  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000\r
\r
  # Size of the region used by UEFI in permanent memory (Reserved 64MB)\r
  gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000\r
\r
  #\r
  # ARM Pcds\r
  #\r
  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000\r
\r
  ## Trustzone enable (to make the transition from EL3 to NS EL2 in ArmPlatformPkg/Sec)\r
  gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE\r
\r
  #\r
  # ARM PrimeCell\r
  #\r
\r
  ## SP805 Watchdog - Motherboard Watchdog at 24MHz\r
  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000\r
  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|24000000\r
\r
  ## PL011 - Serial Terminal\r
  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000\r
  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400\r
\r
  ## PL031 RealTimeClock\r
  gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000\r
\r
  ## PL111 Versatile Express Motherboard controller\r
  gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000\r
\r
  ## PL180 MMC/SD card controller\r
  gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x1C010048\r
  gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000\r
\r
  #\r
  # ARM General Interrupt Controller\r
  #\r
!ifdef ARM_FVP_LEGACY_GICV2_LOCATION\r
  gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000\r
  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000\r
!else\r
  gArmTokenSpaceGuid.PcdGicDistributorBase|0x2f000000\r
  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x2f100000\r
  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000000\r
!endif\r
\r
  #\r
  # ARM OS Loader\r
  #\r
  gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from SemiHosting"\r
  gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"Fv(87940482-FC81-41C3-87E6-399CF85AC8A0)/LinuxLoader.efi"\r
  gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/Image -f VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/filesystem.cpio.gz -c \"console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9\""\r
\r
  # Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)\r
  gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"\r
  gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"\r
\r
  #\r
  # ARM Architectural Timer Frequency\r
  #\r
  # Set tick frequency value to 100Mhz\r
  gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000\r
\r
[PcdsDynamicDefault.common]\r
  #\r
  # The size of a dynamic PCD of the (VOID*) type can not be increased at run\r
  # time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128\r
  # character "empty" string, to allow to be able to set FDT text device paths\r
  # up to 128 characters long.\r
  #\r
  gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L"                                                                                                                                "\r
\r
################################################################################\r
#\r
# Components Section - list of all EDK II Modules needed by this Platform\r
#\r
################################################################################\r
[Components.common]\r
\r
  #\r
  # SEC\r
  #\r
  ArmPlatformPkg/Sec/Sec.inf {\r
    <LibraryClasses>\r
      # Use the implementation which set the Secure bits\r
      ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf\r
  }\r
\r
  #\r
  # PEI Phase modules\r
  #\r
!ifdef EDK2_SKIP_PEICORE\r
  # UEFI is placed in RAM by bootloader\r
  ArmPlatformPkg/PrePi/PeiMPCore.inf {\r
    <LibraryClasses>\r
      ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf\r
      ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf\r
      ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf\r
  }\r
!else\r
  # UEFI lives in FLASH and copies itself to RAM\r
  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {\r
    <LibraryClasses>\r
      ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf\r
  }\r
  MdeModulePkg/Core/Pei/PeiMain.inf\r
  MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {\r
    <LibraryClasses>\r
      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
  }\r
  ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  Nt32Pkg/BootModePei/BootModePei.inf\r
  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {\r
    <LibraryClasses>\r
      NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
  }\r
!endif\r
\r
  #\r
  # DXE\r
  #\r
  MdeModulePkg/Core/Dxe/DxeMain.inf {\r
    <LibraryClasses>\r
      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf\r
  }\r
\r
  #\r
  # Architectural Protocols\r
  #\r
  ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
!if $(SECURE_BOOT_ENABLE) == TRUE\r
  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {\r
    <LibraryClasses>\r
      NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf\r
  }\r
  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
!else\r
  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
!endif\r
  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {\r
    <LibraryClasses>\r
      NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf\r
  }\r
  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
!if $(SECURE_BOOT_ENABLE) == TRUE\r
  ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf\r
!else\r
  ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
!endif\r
  ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
  ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
  ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
  # Semi-hosting filesystem\r
  #\r
  ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
\r
  #\r
  # Multimedia Card Interface\r
  #\r
  EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
\r
  #\r
  # Platform Driver\r
  #\r
  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
  OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
\r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
  #\r
  # Bds\r
  #\r
  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
!if $(USE_ARM_BDS) == TRUE\r
  ArmPlatformPkg/Bds/Bds.inf\r
!else\r
  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
!endif\r
Commit	Line	Data
75f63034	1	#\r
919697ae	2	# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
921e987b	3	# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
75f63034 OM	4	#\r
	5	# This program and the accompanying materials\r
	6	# are licensed and made available under the terms and conditions of the BSD License\r
	7	# which accompanies this distribution. The full text of the license may be found at\r
	8	# http://opensource.org/licenses/bsd-license.php\r
	9	#\r
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	#\r
	13	#\r
	14	\r
	15	################################################################################\r
	16	#\r
	17	# Defines Section - statements that will be processed to create a Makefile.\r
	18	#\r
	19	################################################################################\r
	20	[Defines]\r
	21	PLATFORM_NAME = ArmVExpress-FVP-AArch64\r
	22	PLATFORM_GUID = 0de70077-9b3b-43bf-ba38-0ea37d77141b\r
	23	PLATFORM_VERSION = 0.1\r
	24	DSC_SPECIFICATION = 0x00010005\r
	25	OUTPUT_DIRECTORY = Build/ArmVExpress-FVP-AArch64\r
	26	SUPPORTED_ARCHITECTURES = AARCH64\r
	27	BUILD_TARGETS = DEBUG\|RELEASE\r
	28	SKUID_IDENTIFIER = DEFAULT\r
	29	FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf\r
	30	\r
da5ae569 OM	31	!ifndef ARM_FVP_RUN_NORFLASH\r
	32	DEFINE EDK2_SKIP_PEICORE=1\r
	33	!endif\r
	34	\r
	35	\r
75f63034 OM	36	!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc\r
	37	\r
	38	[LibraryClasses.common]\r
	39	ArmLib\|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf\r
	40	ArmCpuLib\|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf\r
	41	ArmPlatformLib\|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf\r
	42	\r
	43	ArmPlatformSysConfigLib\|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf\r
	44	NorFlashPlatformLib\|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf\r
75f63034	45	LcdPlatformLib\|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf\r
75f63034 OM	46	\r
	47	TimerLib\|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf\r
	48	\r
e94784c6 OM	49	# Virtio Support\r
	50	VirtioLib\|OvmfPkg/Library/VirtioLib/VirtioLib.inf\r
	51	VirtioMmioDeviceLib\|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf\r
	52	\r
75f63034 OM	53	[LibraryClasses.common.SEC]\r
	54	ArmLib\|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf\r
	55	ArmPlatformSecLib\|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf\r
	56	ArmPlatformLib\|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf\r
	57	\r
04f1a709 RC	58	[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]\r
	59	PcdLib\|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
	60	\r
75f63034 OM	61	[BuildOptions]\r
	62	GCC:__AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM\r
	63	\r
	64	\r
	65	################################################################################\r
	66	#\r
	67	# Pcd Section - list of all EDK II PCD Entries defined by this Platform\r
	68	#\r
	69	################################################################################\r
	70	\r
	71	[PcdsFeatureFlag.common]\r
	72	\r
	73	## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.\r
	74	# It could be set FALSE to save size.\r
	75	gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport\|TRUE\r
	76	\r
460e1e0d OM	77	# Force the UEFI GIC driver to use GICv2 legacy mode. To use\r
	78	# GICv3 without GICv2 legacy in UEFI, the ARM Trusted Firmware needs\r
	79	# to configure the Non-Secure interrupts in the GIC Redistributors\r
	80	# which is not supported at the moment.\r
	81	gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy\|TRUE\r
	82	\r
75f63034 OM	83	[PcdsFixedAtBuild.common]\r
	84	gArmPlatformTokenSpaceGuid.PcdFirmwareVendor\|"ARM Fixed Virtual Platform"\r
	85	gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt\|"ARM-FVP"\r
	86	\r
	87	# Up to 8 cores on Base models. This works fine if model happens to have less.\r
	88	gArmPlatformTokenSpaceGuid.PcdCoreCount\|8\r
cddd490b	89	gArmPlatformTokenSpaceGuid.PcdClusterCount\|2\r
75f63034 OM	90	\r
	91	#\r
	92	# NV Storage PCDs. Use base of 0x0C000000 for NOR1\r
	93	#\r
	94	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase\|0x0FFC0000\r
	95	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\|0x00010000\r
	96	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase\|0x0FFD0000\r
	97	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\|0x00010000\r
	98	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase\|0x0FFE0000\r
	99	gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\|0x00010000\r
	100	\r
	101	gArmTokenSpaceGuid.PcdVFPEnabled\|1\r
	102	\r
	103	# FVP models can have 2 clusters with 4 cpus each\r
	104	# Stacks for MPCores in Secure World\r
	105	# Trusted SRAM (DRAM on Foundation model)\r
	106	gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase\|0x04000000\r
	107	gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize\|0x1000\r
	108	gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize\|0x800\r
	109	\r
	110	# Stacks for MPCores in Normal World\r
	111	# Non-Trusted SRAM\r
	112	gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase\|0x2E000000\r
	113	gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\|0x4000\r
da5ae569	114	gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize\|0x1000\r
75f63034	115	\r
cc135144	116	# System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)\r
75f63034	117	gArmTokenSpaceGuid.PcdSystemMemoryBase\|0x80000000\r
cc135144	118	gArmTokenSpaceGuid.PcdSystemMemorySize\|0x7F000000\r
75f63034 OM	119	\r
	120	# Size of the region used by UEFI in permanent memory (Reserved 64MB)\r
	121	gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize\|0x04000000\r
	122	\r
	123	#\r
	124	# ARM Pcds\r
	125	#\r
	126	gArmTokenSpaceGuid.PcdArmUncachedMemoryMask\|0x0000000040000000\r
	127	\r
	128	## Trustzone enable (to make the transition from EL3 to NS EL2 in ArmPlatformPkg/Sec)\r
	129	gArmTokenSpaceGuid.PcdTrustzoneSupport\|TRUE\r
	130	\r
	131	#\r
	132	# ARM PrimeCell\r
	133	#\r
	134	\r
	135	## SP805 Watchdog - Motherboard Watchdog at 24MHz\r
	136	gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase\|0x1C0F0000\r
	137	gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz\|24000000\r
	138	\r
	139	## PL011 - Serial Terminal\r
	140	gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase\|0x1c090000\r
	141	gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate\|38400\r
	142	\r
	143	## PL031 RealTimeClock\r
	144	gArmPlatformTokenSpaceGuid.PcdPL031RtcBase\|0x1C170000\r
	145	\r
75f63034 OM	146	## PL111 Versatile Express Motherboard controller\r
	147	gArmPlatformTokenSpaceGuid.PcdPL111LcdBase\|0x1C1F0000\r
	148	\r
	149	## PL180 MMC/SD card controller\r
	150	gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress\|0x1C010048\r
	151	gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress\|0x1C050000\r
75f63034 OM	152	\r
	153	#\r
	154	# ARM General Interrupt Controller\r
	155	#\r
	156	!ifdef ARM_FVP_LEGACY_GICV2_LOCATION\r
	157	gArmTokenSpaceGuid.PcdGicDistributorBase\|0x2C001000\r
	158	gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase\|0x2C002000\r
	159	!else\r
	160	gArmTokenSpaceGuid.PcdGicDistributorBase\|0x2f000000\r
919697ae	161	gArmTokenSpaceGuid.PcdGicRedistributorsBase\|0x2f100000\r
75f63034 OM	162	gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase\|0x2C000000\r
	163	!endif\r
	164	\r
	165	#\r
	166	# ARM OS Loader\r
	167	#\r
75f63034	168	gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription\|L"Linux from SemiHosting"\r
c14effd7 OM	169	gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath\|L"Fv(87940482-FC81-41C3-87E6-399CF85AC8A0)/LinuxLoader.efi"\r
c14effd7 OM	170	gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument\|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/Image -f VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/filesystem.cpio.gz -c \"console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9\""\r
75f63034 OM	171	\r
	172	# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)\r
	173	gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths\|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"\r
	174	gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths\|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"\r
	175	\r
	176	#\r
b4a6629f	177	# ARM Architectural Timer Frequency\r
75f63034	178	#\r
b4a6629f OM	179	# Set tick frequency value to 100Mhz\r
b4a6629f OM	180	gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz\|100000000\r
75f63034	181	\r
04f1a709 RC	182	[PcdsDynamicDefault.common]\r
	183	#\r
	184	# The size of a dynamic PCD of the (VOID*) type can not be increased at run\r
	185	# time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128\r
	186	# character "empty" string, to allow to be able to set FDT text device paths\r
	187	# up to 128 characters long.\r
	188	#\r
	189	gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths\|L" "\r
	190	\r
75f63034 OM	191	################################################################################\r
	192	#\r
	193	# Components Section - list of all EDK II Modules needed by this Platform\r
	194	#\r
	195	################################################################################\r
	196	[Components.common]\r
	197	\r
	198	#\r
	199	# SEC\r
	200	#\r
	201	ArmPlatformPkg/Sec/Sec.inf {\r
	202	<LibraryClasses>\r
	203	# Use the implementation which set the Secure bits\r
	204	ArmGicLib\|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf\r
	205	}\r
	206	\r
	207	#\r
	208	# PEI Phase modules\r
	209	#\r
da5ae569 OM	210	!ifdef EDK2_SKIP_PEICORE\r
	211	# UEFI is placed in RAM by bootloader\r
	212	ArmPlatformPkg/PrePi/PeiMPCore.inf {\r
	213	<LibraryClasses>\r
	214	ArmLib\|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf\r
	215	ArmPlatformLib\|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf\r
	216	ArmPlatformGlobalVariableLib\|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf\r
	217	}\r
	218	!else\r
	219	# UEFI lives in FLASH and copies itself to RAM\r
75f63034 OM	220	ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {\r
	221	<LibraryClasses>\r
	222	ArmPlatformGlobalVariableLib\|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf\r
	223	}\r
	224	MdeModulePkg/Core/Pei/PeiMain.inf\r
	225	MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
	226	<LibraryClasses>\r
	227	PcdLib\|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
	228	}\r
	229	ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
	230	ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
	231	ArmPkg/Drivers/CpuPei/CpuPei.inf\r
	232	IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	233	Nt32Pkg/BootModePei/BootModePei.inf\r
	234	MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
	235	MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {\r
	236	<LibraryClasses>\r
9435a57e	237	NULL\|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
75f63034	238	}\r
da5ae569	239	!endif\r
75f63034 OM	240	\r
	241	#\r
	242	# DXE\r
	243	#\r
	244	MdeModulePkg/Core/Dxe/DxeMain.inf {\r
	245	<LibraryClasses>\r
	246	PcdLib\|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
	247	NULL\|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf\r
	248	}\r
	249	\r
	250	#\r
	251	# Architectural Protocols\r
	252	#\r
	253	ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
	254	MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
465be78e AB	255	!if $(SECURE_BOOT_ENABLE) == TRUE\r
	256	MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {\r
	257	<LibraryClasses>\r
	258	NULL\|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf\r
	259	}\r
	260	SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
	261	!else\r
75f63034	262	MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
465be78e	263	!endif\r
75f63034	264	MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
e820fe36 SZ	265	MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {\r
	266	<LibraryClasses>\r
	267	NULL\|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf\r
	268	}\r
75f63034 OM	269	MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
	270	MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
	271	EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
	272	EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
	273	EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
	274	\r
	275	MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
	276	MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
	277	MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
	278	MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
921e987b	279	MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
75f63034 OM	280	\r
	281	MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
	282	\r
	283	ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
465be78e AB	284	!if $(SECURE_BOOT_ENABLE) == TRUE\r
	285	ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf\r
	286	!else\r
75f63034	287	ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
465be78e	288	!endif\r
75f63034	289	ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
75f63034	290	ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
75f63034 OM	291	ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
	292	\r
	293	#\r
	294	# Semi-hosting filesystem\r
	295	#\r
	296	ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
	297	\r
75f63034 OM	298	#\r
	299	# Multimedia Card Interface\r
	300	#\r
	301	EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
	302	ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
75f63034	303	\r
e94784c6 OM	304	#\r
	305	# Platform Driver\r
	306	#\r
a4ab7df4	307	ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
e94784c6 OM	308	OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
e94784c6 OM	309	\r
75f63034 OM	310	#\r
	311	# FAT filesystem + GPT/MBR partitioning\r
	312	#\r
	313	MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	314	MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
	315	MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
	316	\r
	317	#\r
	318	# Bds\r
	319	#\r
	320	MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
f46ac5fb	321	!if $(USE_ARM_BDS) == TRUE\r
75f63034	322	ArmPlatformPkg/Bds/Bds.inf\r
f46ac5fb AB	323	!else\r
	324	MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
	325	MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
	326	IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
	327	!endif\r