[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-FVP-AArch64.fdf

#\r
#  Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r
#\r
#  This program and the accompanying materials\r
#  are licensed and made available under the terms and conditions of the BSD License\r
#  which accompanies this distribution.  The full text of the license may be found at\r
#  http://opensource.org/licenses/bsd-license.php\r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
\r
[FD.FVP_AARCH64_EFI_SEC]\r
BaseAddress   = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in SecureROM.\r
Size          = 0x04000000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the device (64MiB).\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x4000\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00080000\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
FV = FVMAIN_SEC\r
\r
[FD.FVP_AARCH64_EFI]\r
!ifdef ARM_FVP_RUN_NORFLASH\r
BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in Flash0.\r
!else\r
BaseAddress   = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # UEFI in DRAM + 128MB.\r
!endif\r
Size          = 0x04000000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the device (64MiB).\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x4000\r
\r
0x00000000|0x00280000\r
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
FV = FVMAIN_COMPACT\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
\r
[FV.FVMAIN_SEC]\r
FvBaseAddress      = 0x0  # Secure ROM\r
FvForceRebase      = TRUE\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF ArmPlatformPkg/Sec/Sec.inf\r
\r
\r
[FV.FvMain]\r
BlockSize          = 0x40\r
NumBlocks          = 0         # This FV gets compressed so make it just big enough\r
FvAlignment        = 16        # FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
FvNameGuid         = 87940482-fc81-41c3-87e6-399cf85ac8a0\r
\r
  APRIORI DXE {\r
    INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
  }\r
\r
  INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
\r
  #\r
  # PI DXE Drivers producing Architectural Protocols (EFI Services)\r
  #\r
  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  #\r
  # Multiple Console IO support\r
  #\r
  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
\r
  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
!ifndef ARM_FOUNDATION_FVP\r
  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
!endif\r
  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
  # Semi-hosting filesystem\r
  #\r
  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
\r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
!ifndef ARM_FOUNDATION_FVP\r
  #\r
  # Multimedia Card Interface\r
  #\r
  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
!endif\r
\r
  #\r
  # Platform Driver\r
  #\r
  INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
  INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
\r
  #\r
  # UEFI application (Shell Embedded Boot Loader)\r
  #\r
  INF ShellBinPkg/UefiShell/UefiShell.inf\r
\r
  #\r
  # Bds\r
  #\r
  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF ArmPlatformPkg/Bds/Bds.inf\r
\r
  # Legacy Linux Loader\r
  INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf\r
\r
  # FV Filesystem\r
  INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
\r
  #\r
  # FDT installation\r
  #\r
  # The UEFI driver is at the end of the list of the driver to be dispatched\r
  # after the device drivers (eg: Ethernet) to ensure we have support for them.\r
  INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r
\r
!ifdef $(DTB_DIR)\r
  #\r
  # Embed flattened device tree (FDT) images for all known\r
  # variants of this platform\r
  #\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {\r
    $(DTB_DIR)/fvp-base-gicv2-psci.dtb\r
  }\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {\r
    $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb\r
  }\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {\r
    $(DTB_DIR)/fvp-base-gicv3-psci.dtb\r
  }\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {\r
    $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb\r
  }\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {\r
    $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb\r
  }\r
  FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {\r
    $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb\r
  }\r
!endif\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(EDK2_SKIP_PEICORE) == 1\r
  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
!else\r
  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
  INF MdeModulePkg/Core/Pei/PeiMain.inf\r
  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!endif\r
\r
  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
      SECTION FV_IMAGE = FVMAIN\r
    }\r
  }\r
\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
\r
\r
############################################################################\r
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #\r
############################################################################\r
#\r
#[Rule.Common.DXE_DRIVER]\r
#  FILE DRIVER = $(NAMED_GUID) {\r
#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
#    COMPRESS PI_STD {\r
#      GUIDED {\r
#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
#        UI       STRING="$(MODULE_NAME)" Optional\r
#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
#      }\r
#    }\r
#  }\r
#\r
############################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE Align = 4K                  $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    TE     TE Align = 8                 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI     STRING ="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE       TE Align = 8              $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
      UI        STRING="$(MODULE_NAME)" Optional\r
    }\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI     STRING ="$(MODULE_NAME)"     Optional\r
    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.UEFI_DRIVER.BINARY]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional      |.depex\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.BINARY]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
Commit	Line	Data
75f63034	1	#\r
04f1a709	2	# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r
75f63034 OM	3	#\r
	4	# This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#\r
	12	\r
	13	################################################################################\r
	14	#\r
	15	# FD Section\r
	16	# The [FD] Section is made up of the definition statements and a\r
	17	# description of what goes into the Flash Device Image. Each FD section\r
	18	# defines one flash "device" image. A flash device image may be one of\r
	19	# the following: Removable media bootable image (like a boot floppy\r
	20	# image,) an Option ROM image (that would be "flashed" into an add-in\r
	21	# card,) a System "Flash" image (that would be burned into a system's\r
	22	# flash) or an Update ("Capsule") image that will be used to update and\r
	23	# existing system flash.\r
	24	#\r
	25	################################################################################\r
	26	\r
	27	[FD.FVP_AARCH64_EFI_SEC]\r
	28	BaseAddress = 0x00000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.\r
	29	Size = 0x04000000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).\r
	30	ErasePolarity = 1\r
	31	\r
	32	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
	33	BlockSize = 0x00001000\r
	34	NumBlocks = 0x4000\r
	35	\r
	36	################################################################################\r
	37	#\r
	38	# Following are lists of FD Region layout which correspond to the locations of different\r
	39	# images within the flash device.\r
	40	#\r
	41	# Regions must be defined in ascending order and may not overlap.\r
	42	#\r
	43	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	44	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	45	# "0x" characters. Like:\r
	46	# Offset\|Size\r
	47	# PcdOffsetCName\|PcdSizeCName\r
	48	# RegionType <FV, DATA, or FILE>\r
	49	#\r
	50	################################################################################\r
	51	\r
	52	0x00000000\|0x00080000\r
	53	gArmTokenSpaceGuid.PcdSecureFvBaseAddress\|gArmTokenSpaceGuid.PcdSecureFvSize\r
	54	FV = FVMAIN_SEC\r
	55	\r
	56	[FD.FVP_AARCH64_EFI]\r
da5ae569	57	!ifdef ARM_FVP_RUN_NORFLASH\r
75f63034	58	BaseAddress = 0x08000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.\r
da5ae569 OM	59	!else\r
	60	BaseAddress = 0x88000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB.\r
	61	!endif\r
75f63034 OM	62	Size = 0x04000000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).\r
	63	ErasePolarity = 1\r
	64	\r
	65	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
	66	BlockSize = 0x00001000\r
	67	NumBlocks = 0x4000\r
	68	\r
	69	0x00000000\|0x00280000\r
	70	gArmTokenSpaceGuid.PcdFvBaseAddress\|gArmTokenSpaceGuid.PcdFvSize\r
	71	FV = FVMAIN_COMPACT\r
	72	\r
	73	################################################################################\r
	74	#\r
	75	# FV Section\r
	76	#\r
	77	# [FV] section is used to define what components or modules are placed within a flash\r
	78	# device file. This section also defines order the components and modules are positioned\r
	79	# within the image. The [FV] section consists of define statements, set statements and\r
	80	# module statements.\r
	81	#\r
	82	################################################################################\r
	83	\r
	84	[FV.FVMAIN_SEC]\r
	85	FvBaseAddress = 0x0 # Secure ROM\r
	86	FvForceRebase = TRUE\r
	87	FvAlignment = 16\r
	88	ERASE_POLARITY = 1\r
	89	MEMORY_MAPPED = TRUE\r
	90	STICKY_WRITE = TRUE\r
	91	LOCK_CAP = TRUE\r
	92	LOCK_STATUS = TRUE\r
	93	WRITE_DISABLED_CAP = TRUE\r
	94	WRITE_ENABLED_CAP = TRUE\r
	95	WRITE_STATUS = TRUE\r
	96	WRITE_LOCK_CAP = TRUE\r
	97	WRITE_LOCK_STATUS = TRUE\r
	98	READ_DISABLED_CAP = TRUE\r
	99	READ_ENABLED_CAP = TRUE\r
	100	READ_STATUS = TRUE\r
	101	READ_LOCK_CAP = TRUE\r
	102	READ_LOCK_STATUS = TRUE\r
	103	\r
	104	INF ArmPlatformPkg/Sec/Sec.inf\r
	105	\r
	106	\r
	107	[FV.FvMain]\r
	108	BlockSize = 0x40\r
	109	NumBlocks = 0 # This FV gets compressed so make it just big enough\r
	110	FvAlignment = 16 # FV alignment and FV attributes setting.\r
	111	ERASE_POLARITY = 1\r
	112	MEMORY_MAPPED = TRUE\r
	113	STICKY_WRITE = TRUE\r
	114	LOCK_CAP = TRUE\r
	115	LOCK_STATUS = TRUE\r
	116	WRITE_DISABLED_CAP = TRUE\r
	117	WRITE_ENABLED_CAP = TRUE\r
	118	WRITE_STATUS = TRUE\r
	119	WRITE_LOCK_CAP = TRUE\r
	120	WRITE_LOCK_STATUS = TRUE\r
	121	READ_DISABLED_CAP = TRUE\r
	122	READ_ENABLED_CAP = TRUE\r
	123	READ_STATUS = TRUE\r
	124	READ_LOCK_CAP = TRUE\r
	125	READ_LOCK_STATUS = TRUE\r
e6c51eaf	126	FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0\r
75f63034	127	\r
04f1a709 RC	128	APRIORI DXE {\r
	129	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
	130	}\r
	131	\r
75f63034	132	INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
04f1a709	133	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
75f63034 OM	134	\r
	135	#\r
	136	# PI DXE Drivers producing Architectural Protocols (EFI Services)\r
	137	#\r
	138	INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
	139	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
	140	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
	141	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
	142	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
	143	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
	144	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
	145	INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
	146	INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
	147	INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
	148	\r
	149	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
	150	\r
	151	#\r
	152	# Multiple Console IO support\r
	153	#\r
	154	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
	155	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
	156	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
	157	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
	158	INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
	159	\r
	160	INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
	161	INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
	162	INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
	163	!ifndef ARM_FOUNDATION_FVP\r
	164	INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
	165	!endif\r
	166	INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
	167	\r
	168	#\r
	169	# Semi-hosting filesystem\r
	170	#\r
	171	INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
	172	\r
	173	#\r
	174	# FAT filesystem + GPT/MBR partitioning\r
	175	#\r
	176	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	177	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
	178	INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
	179	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
	180	\r
	181	!ifndef ARM_FOUNDATION_FVP\r
	182	#\r
	183	# Multimedia Card Interface\r
	184	#\r
	185	INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
	186	INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
	187	!endif\r
	188	\r
e94784c6 OM	189	#\r
	190	# Platform Driver\r
	191	#\r
a4ab7df4	192	INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
e94784c6	193	INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
974d6117	194	\r
75f63034 OM	195	#\r
	196	# UEFI application (Shell Embedded Boot Loader)\r
	197	#\r
	198	INF ShellBinPkg/UefiShell/UefiShell.inf\r
	199	\r
	200	#\r
	201	# Bds\r
	202	#\r
	203	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	204	INF ArmPlatformPkg/Bds/Bds.inf\r
	205	\r
0ead5ec4 RC	206	# Legacy Linux Loader\r
	207	INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf\r
	208	\r
901b4516 OM	209	# FV Filesystem\r
901b4516 OM	210	INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
f066ab4e OM	211	\r
	212	#\r
	213	# FDT installation\r
	214	#\r
	215	# The UEFI driver is at the end of the list of the driver to be dispatched\r
	216	# after the device drivers (eg: Ethernet) to ensure we have support for them.\r
	217	INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r
75f63034	218	\r
0ee59fd7 AB	219	!ifdef $(DTB_DIR)\r
	220	#\r
	221	# Embed flattened device tree (FDT) images for all known\r
	222	# variants of this platform\r
	223	#\r
	224	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {\r
	225	$(DTB_DIR)/fvp-base-gicv2-psci.dtb\r
	226	}\r
	227	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {\r
	228	$(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb\r
	229	}\r
	230	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {\r
	231	$(DTB_DIR)/fvp-base-gicv3-psci.dtb\r
	232	}\r
	233	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {\r
	234	$(DTB_DIR)/fvp-foundation-gicv2-psci.dtb\r
	235	}\r
	236	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {\r
	237	$(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb\r
	238	}\r
	239	FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {\r
	240	$(DTB_DIR)/fvp-foundation-gicv3-psci.dtb\r
	241	}\r
	242	!endif\r
	243	\r
75f63034 OM	244	[FV.FVMAIN_COMPACT]\r
	245	FvAlignment = 16\r
	246	ERASE_POLARITY = 1\r
	247	MEMORY_MAPPED = TRUE\r
	248	STICKY_WRITE = TRUE\r
	249	LOCK_CAP = TRUE\r
	250	LOCK_STATUS = TRUE\r
	251	WRITE_DISABLED_CAP = TRUE\r
	252	WRITE_ENABLED_CAP = TRUE\r
	253	WRITE_STATUS = TRUE\r
	254	WRITE_LOCK_CAP = TRUE\r
	255	WRITE_LOCK_STATUS = TRUE\r
	256	READ_DISABLED_CAP = TRUE\r
	257	READ_ENABLED_CAP = TRUE\r
	258	READ_STATUS = TRUE\r
	259	READ_LOCK_CAP = TRUE\r
	260	READ_LOCK_STATUS = TRUE\r
	261	\r
da5ae569 OM	262	!if $(EDK2_SKIP_PEICORE) == 1\r
	263	INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
	264	!else\r
75f63034 OM	265	INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
	266	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
	267	INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
	268	INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
	269	INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
	270	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	271	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	272	INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
	273	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
da5ae569	274	!endif\r
75f63034 OM	275	\r
	276	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
	277	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
	278	SECTION FV_IMAGE = FVMAIN\r
	279	}\r
	280	}\r
	281	\r
	282	\r
	283	################################################################################\r
	284	#\r
	285	# Rules are use with the [FV] section's module INF type to define\r
	286	# how an FFS file is created for a given INF file. The following Rule are the default\r
	287	# rules for the different module type. User can add the customized rules to define the\r
	288	# content of the FFS file.\r
	289	#\r
	290	################################################################################\r
	291	\r
	292	\r
	293	############################################################################\r
	294	# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r
	295	############################################################################\r
	296	#\r
	297	#[Rule.Common.DXE_DRIVER]\r
	298	# FILE DRIVER = $(NAMED_GUID) {\r
	299	# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	300	# COMPRESS PI_STD {\r
	301	# GUIDED {\r
	302	# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	303	# UI STRING="$(MODULE_NAME)" Optional\r
	304	# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	305	# }\r
	306	# }\r
	307	# }\r
	308	#\r
	309	############################################################################\r
	310	\r
	311	[Rule.Common.SEC]\r
	312	FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
6d0ca257	313	TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
75f63034 OM	314	}\r
	315	\r
	316	[Rule.Common.PEI_CORE]\r
	317	FILE PEI_CORE = $(NAMED_GUID) {\r
	318	TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	319	UI STRING ="$(MODULE_NAME)" Optional\r
	320	}\r
	321	\r
	322	[Rule.Common.PEIM]\r
	323	FILE PEIM = $(NAMED_GUID) {\r
	324	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	325	TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	326	UI STRING="$(MODULE_NAME)" Optional\r
	327	}\r
	328	\r
	329	[Rule.Common.PEIM.TIANOCOMPRESSED]\r
	330	FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
	331	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	332	GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
	333	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	334	UI STRING="$(MODULE_NAME)" Optional\r
	335	}\r
	336	}\r
	337	\r
	338	[Rule.Common.DXE_CORE]\r
	339	FILE DXE_CORE = $(NAMED_GUID) {\r
	340	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	341	UI STRING="$(MODULE_NAME)" Optional\r
	342	}\r
	343	\r
	344	[Rule.Common.UEFI_DRIVER]\r
	345	FILE DRIVER = $(NAMED_GUID) {\r
	346	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	347	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	348	UI STRING="$(MODULE_NAME)" Optional\r
	349	}\r
	350	\r
	351	[Rule.Common.DXE_DRIVER]\r
	352	FILE DRIVER = $(NAMED_GUID) {\r
	353	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	354	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	355	UI STRING="$(MODULE_NAME)" Optional\r
	356	}\r
	357	\r
	358	[Rule.Common.DXE_RUNTIME_DRIVER]\r
	359	FILE DRIVER = $(NAMED_GUID) {\r
	360	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	361	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	362	UI STRING="$(MODULE_NAME)" Optional\r
	363	}\r
	364	\r
	365	[Rule.Common.UEFI_APPLICATION]\r
	366	FILE APPLICATION = $(NAMED_GUID) {\r
	367	UI STRING ="$(MODULE_NAME)" Optional\r
	368	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	369	}\r
	370	\r
	371	[Rule.Common.UEFI_DRIVER.BINARY]\r
	372	FILE DRIVER = $(NAMED_GUID) {\r
	373	DXE_DEPEX DXE_DEPEX Optional \|.depex\r
	374	PE32 PE32 \|.efi\r
	375	UI STRING="$(MODULE_NAME)" Optional\r
	376	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	377	}\r
378	\r
379	[Rule.Common.UEFI_APPLICATION.BINARY]\r
380	FILE APPLICATION = $(NAMED_GUID) {\r
381	PE32 PE32 \|.efi\r
382	UI STRING="$(MODULE_NAME)" Optional\r
383	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
384	}\r