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ArmPlatformPkg/ArmVExpressDxe: Load FDT into the EFI Configuration Table
[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-RTSM-A15_MPCore.fdf
CommitLineData
1e57a462 1#\r
04f1a709 2# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
1e57a462 3#\r
3402aac7
RC		 4# This program and the accompanying materials\r
5# are licensed and made available under the terms and conditions of the BSD License\r
6# which accompanies this distribution. The full text of the license may be found at\r
7# http://opensource.org/licenses/bsd-license.php\r
8#\r
9# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
1e57a462 11#\r
12\r
13################################################################################\r
14#\r
15# FD Section\r
16# The [FD] Section is made up of the definition statements and a\r
17# description of what goes into the Flash Device Image. Each FD section\r
18# defines one flash "device" image. A flash device image may be one of\r
19# the following: Removable media bootable image (like a boot floppy\r
20# image,) an Option ROM image (that would be "flashed" into an add-in\r
21# card,) a System "Flash" image (that would be burned into a system's\r
22# flash) or an Update ("Capsule") image that will be used to update and\r
23# existing system flash.\r
24#\r
25################################################################################\r
26\r
27[FD.RTSM_VE_Cortex-A15_MPCore_EFI]\r
28BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r
9e2e89f0 29Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r
1e57a462 30ErasePolarity = 1\r
31\r
32# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
33BlockSize = 0x00001000\r
9e2e89f0 34NumBlocks = 0x300\r
1e57a462 35\r
36################################################################################\r
37#\r
38# Following are lists of FD Region layout which correspond to the locations of different\r
39# images within the flash device.\r
40#\r
41# Regions must be defined in ascending order and may not overlap.\r
42#\r
43# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
44# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
45# "0x" characters. Like:\r
46# Offset|Size\r
47# PcdOffsetCName|PcdSizeCName\r
48# RegionType <FV, DATA, or FILE>\r
49#\r
50################################################################################\r
51\r
520x00000000|0x00080000\r
53gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
54FV = FVMAIN_SEC\r
55\r
560x00080000|0x00280000\r
57gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
58FV = FVMAIN_COMPACT\r
59\r
60\r
61################################################################################\r
62#\r
63# FV Section\r
64#\r
65# [FV] section is used to define what components or modules are placed within a flash\r
66# device file. This section also defines order the components and modules are positioned\r
67# within the image. The [FV] section consists of define statements, set statements and\r
68# module statements.\r
69#\r
70################################################################################\r
71\r
72[FV.FVMAIN_SEC]\r
73FvAlignment = 8\r
74ERASE_POLARITY = 1\r
75MEMORY_MAPPED = TRUE\r
76STICKY_WRITE = TRUE\r
77LOCK_CAP = TRUE\r
78LOCK_STATUS = TRUE\r
79WRITE_DISABLED_CAP = TRUE\r
80WRITE_ENABLED_CAP = TRUE\r
81WRITE_STATUS = TRUE\r
82WRITE_LOCK_CAP = TRUE\r
83WRITE_LOCK_STATUS = TRUE\r
84READ_DISABLED_CAP = TRUE\r
85READ_ENABLED_CAP = TRUE\r
86READ_STATUS = TRUE\r
87READ_LOCK_CAP = TRUE\r
88READ_LOCK_STATUS = TRUE\r
89\r
90 INF ArmPlatformPkg/Sec/Sec.inf\r
91\r
92\r
93[FV.FvMain]\r
94BlockSize = 0x40\r
95NumBlocks = 0 # This FV gets compressed so make it just big enough\r
96FvAlignment = 8 # FV alignment and FV attributes setting.\r
97ERASE_POLARITY = 1\r
98MEMORY_MAPPED = TRUE\r
99STICKY_WRITE = TRUE\r
100LOCK_CAP = TRUE\r
101LOCK_STATUS = TRUE\r
102WRITE_DISABLED_CAP = TRUE\r
103WRITE_ENABLED_CAP = TRUE\r
104WRITE_STATUS = TRUE\r
105WRITE_LOCK_CAP = TRUE\r
106WRITE_LOCK_STATUS = TRUE\r
107READ_DISABLED_CAP = TRUE\r
108READ_ENABLED_CAP = TRUE\r
109READ_STATUS = TRUE\r
110READ_LOCK_CAP = TRUE\r
111READ_LOCK_STATUS = TRUE\r
112\r
04f1a709
RC		 113 APRIORI DXE {\r
114 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
115 }\r
116\r
3402aac7 117 INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
04f1a709 118 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
1e57a462 119\r
120 #\r
3402aac7 121 # PI DXE Drivers producing Architectural Protocols (EFI Services)\r
1e57a462 122 #\r
123 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
124 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
125 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
126 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
127 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
128 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
129 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
130 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
131 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
132 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
133\r
134 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
9ad8d7d0
RP		 135\r
136 #\r
137 # Networking stack\r
138 #\r
139 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
140 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
141 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
142 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf\r
143 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
144 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
145 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
146 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
147 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
148 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
149 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
150 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
151\r
1e57a462 152 #\r
153 # Multiple Console IO support\r
154 #\r
155 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
156 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
157 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
158 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
159 INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
160\r
017baa1c 161 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
1e57a462 162 INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
163 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
164 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
165 INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
166\r
167 #\r
168 # Semi-hosting filesystem\r
169 #\r
170 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
3402aac7 171\r
1e57a462 172 #\r
173 # FAT filesystem + GPT/MBR partitioning\r
174 #\r
175 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
176 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
177 INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
178 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
179\r
94e0955d
OM		 180 # Versatile Express FileSystem\r
181 INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r
182\r
1e57a462 183 #\r
184 # Multimedia Card Interface\r
185 #\r
186 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
187 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
188\r
189 #\r
62d441fb
RC		 190 # Platform Driver\r
191 #\r
192 INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
193 INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
194\r
04f1a709
RC		 195 #\r
196 # FDT installation\r
197 #\r
198 INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r
199\r
62d441fb 200 #\r
3402aac7
RC		 201 # UEFI application (Shell Embedded Boot Loader)\r
202 #\r
203 INF ShellBinPkg/UefiShell/UefiShell.inf\r
204\r
1e57a462 205 #\r
206 # Bds\r
207 #\r
208 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
209 INF ArmPlatformPkg/Bds/Bds.inf\r
210\r
901b4516
OM		 211 # FV Filesystem\r
212 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
1e57a462 213\r
04f1a709
RC		 214 # Example to add a Device Tree to the Firmware Volume\r
215 #FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressFvpA15x4) {\r
216 # SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/rtsm_ve-ca15x4.dtb\r
217 #}\r
218\r
1e57a462 219[FV.FVMAIN_COMPACT]\r
220FvAlignment = 8\r
221ERASE_POLARITY = 1\r
222MEMORY_MAPPED = TRUE\r
223STICKY_WRITE = TRUE\r
224LOCK_CAP = TRUE\r
225LOCK_STATUS = TRUE\r
226WRITE_DISABLED_CAP = TRUE\r
227WRITE_ENABLED_CAP = TRUE\r
228WRITE_STATUS = TRUE\r
229WRITE_LOCK_CAP = TRUE\r
230WRITE_LOCK_STATUS = TRUE\r
231READ_DISABLED_CAP = TRUE\r
232READ_ENABLED_CAP = TRUE\r
233READ_STATUS = TRUE\r
234READ_LOCK_CAP = TRUE\r
235READ_LOCK_STATUS = TRUE\r
236\r
237!if $(EDK2_SKIP_PEICORE) == 1\r
238 INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
239!else\r
240 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
241 INF MdeModulePkg/Core/Pei/PeiMain.inf\r
242 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
243 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
244 INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
245 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
246 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
247 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
248 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
249!endif\r
3402aac7 250\r
1e57a462 251 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
252 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
253 SECTION FV_IMAGE = FVMAIN\r
254 }\r
255 }\r
256\r
257\r
258################################################################################\r
259#\r
260# Rules are use with the [FV] section's module INF type to define\r
261# how an FFS file is created for a given INF file. The following Rule are the default\r
262# rules for the different module type. User can add the customized rules to define the\r
263# content of the FFS file.\r
264#\r
265################################################################################\r
266\r
267\r
268############################################################################\r
3402aac7 269# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r
1e57a462 270############################################################################\r
271#\r
272#[Rule.Common.DXE_DRIVER]\r
273# FILE DRIVER = $(NAMED_GUID) {\r
274# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
275# COMPRESS PI_STD {\r
276# GUIDED {\r
277# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
278# UI STRING="$(MODULE_NAME)" Optional\r
279# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
280# }\r
281# }\r
282# }\r
283#\r
284############################################################################\r
285\r
286[Rule.Common.SEC]\r
287 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
288 TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
289 }\r
290\r
291[Rule.Common.PEI_CORE]\r
292 FILE PEI_CORE = $(NAMED_GUID) {\r
293 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
3402aac7 294 UI STRING ="$(MODULE_NAME)" Optional\r
1e57a462 295 }\r
296\r
297[Rule.Common.PEIM]\r
298 FILE PEIM = $(NAMED_GUID) {\r
299 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
300 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
3402aac7 301 UI STRING="$(MODULE_NAME)" Optional\r
1e57a462 302 }\r
303\r
304[Rule.Common.PEIM.TIANOCOMPRESSED]\r
305 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
306 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
307 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
308 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
309 UI STRING="$(MODULE_NAME)" Optional\r
310 }\r
311 }\r
312\r
313[Rule.Common.DXE_CORE]\r
314 FILE DXE_CORE = $(NAMED_GUID) {\r
315 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
316 UI STRING="$(MODULE_NAME)" Optional\r
317 }\r
318\r
319[Rule.Common.UEFI_DRIVER]\r
320 FILE DRIVER = $(NAMED_GUID) {\r
321 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
322 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
323 UI STRING="$(MODULE_NAME)" Optional\r
324 }\r
325\r
326[Rule.Common.DXE_DRIVER]\r
327 FILE DRIVER = $(NAMED_GUID) {\r
328 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
329 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
330 UI STRING="$(MODULE_NAME)" Optional\r
331 }\r
332\r
333[Rule.Common.DXE_RUNTIME_DRIVER]\r
334 FILE DRIVER = $(NAMED_GUID) {\r
335 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
336 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
337 UI STRING="$(MODULE_NAME)" Optional\r
338 }\r
339\r
340[Rule.Common.UEFI_APPLICATION]\r
341 FILE APPLICATION = $(NAMED_GUID) {\r
3402aac7 342 UI STRING ="$(MODULE_NAME)" Optional\r
1e57a462 343 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
344 }\r
345\r
346[Rule.Common.UEFI_DRIVER.BINARY]\r
347 FILE DRIVER = $(NAMED_GUID) {\r
348 DXE_DEPEX DXE_DEPEX Optional |.depex\r
349 PE32 PE32 |.efi\r
350 UI STRING="$(MODULE_NAME)" Optional\r
351 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
352 }\r
353\r
354[Rule.Common.UEFI_APPLICATION.BINARY]\r
355 FILE APPLICATION = $(NAMED_GUID) {\r
356 PE32 PE32 |.efi\r
357 UI STRING="$(MODULE_NAME)" Optional\r
358 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
359 }\r
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