[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-RTSM-A9x4.fdf

#\r
#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
#\r
#  This program and the accompanying materials\r
#  are licensed and made available under the terms and conditions of the BSD License\r
#  which accompanies this distribution.  The full text of the license may be found at\r
#  http://opensource.org/licenses/bsd-license.php\r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
\r
[FD.RTSM_VE_Cortex-A9_EFI]\r
BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.\r
Size          = 0x00300000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x300\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00080000\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
FV = FVMAIN_SEC\r
\r
0x00080000|0x00280000\r
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
FV = FVMAIN_COMPACT\r
\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
\r
[FV.FVMAIN_SEC]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF ArmPlatformPkg/Sec/Sec.inf\r
\r
\r
[FV.FvMain]\r
BlockSize          = 0x40\r
NumBlocks          = 0         # This FV gets compressed so make it just big enough\r
FvAlignment        = 8         # FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  APRIORI DXE {\r
    INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
  }\r
\r
  INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
\r
  #\r
  # PI DXE Drivers producing Architectural Protocols (EFI Services)\r
  #\r
  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  #\r
  # Multiple Console IO support\r
  #\r
  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
\r
  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
  # Semi-hosting filesystem\r
  #\r
  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
\r
  #\r
  # Versatile Express FileSystem\r
  #\r
  INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r
\r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
  #\r
  # Multimedia Card Interface\r
  #\r
  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
\r
  #\r
  # Platform  Driver\r
  #\r
  INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
  INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
\r
  #\r
  # UEFI application (Shell Embedded Boot Loader)\r
  #\r
  INF ShellBinPkg/UefiShell/UefiShell.inf\r
\r
  #\r
  # Bds\r
  #\r
  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF ArmPlatformPkg/Bds/Bds.inf\r
\r
  # FV Filesystem\r
  INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
\r
  #\r
  # FDT installation\r
  #\r
  # The UEFI driver is at the end of the list of the driver to be dispatched\r
  # after the device drivers (eg: Ethernet) to ensure we have support for them.\r
  INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r
\r
  # Example to add a Device Tree to the Firmware Volume\r
  #FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressFvpA9x4) {\r
  #  SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/rtsm_ve-ca9x4.dtb\r
  #}\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 8\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(EDK2_SKIP_PEICORE) == 1\r
  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
!else\r
  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
  INF MdeModulePkg/Core/Pei/PeiMain.inf\r
  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!endif\r
\r
  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
      SECTION FV_IMAGE = FVMAIN\r
    }\r
  }\r
\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
\r
\r
############################################################################\r
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #\r
############################################################################\r
#\r
#[Rule.Common.DXE_DRIVER]\r
#  FILE DRIVER = $(NAMED_GUID) {\r
#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
#    COMPRESS PI_STD {\r
#      GUIDED {\r
#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
#        UI       STRING="$(MODULE_NAME)" Optional\r
#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
#      }\r
#    }\r
#  }\r
#\r
############################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI     STRING ="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
      UI        STRING="$(MODULE_NAME)" Optional\r
    }\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI     STRING ="$(MODULE_NAME)" Optional\r
    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.UEFI_DRIVER.BINARY]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional      |.depex\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.BINARY]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
Commit	Line	Data
d6550260	1	#\r
04f1a709	2	# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
d6550260	3	#\r
3402aac7 RC	4	# This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
d6550260	11	#\r
	12	\r
	13	################################################################################\r
	14	#\r
	15	# FD Section\r
	16	# The [FD] Section is made up of the definition statements and a\r
	17	# description of what goes into the Flash Device Image. Each FD section\r
	18	# defines one flash "device" image. A flash device image may be one of\r
	19	# the following: Removable media bootable image (like a boot floppy\r
	20	# image,) an Option ROM image (that would be "flashed" into an add-in\r
	21	# card,) a System "Flash" image (that would be burned into a system's\r
	22	# flash) or an Update ("Capsule") image that will be used to update and\r
	23	# existing system flash.\r
	24	#\r
	25	################################################################################\r
	26	\r
	27	[FD.RTSM_VE_Cortex-A9_EFI]\r
	28	BaseAddress = 0x08000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r
9e2e89f0	29	Size = 0x00300000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r
d6550260	30	ErasePolarity = 1\r
	31	\r
	32	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
	33	BlockSize = 0x00001000\r
9e2e89f0	34	NumBlocks = 0x300\r
d6550260	35	\r
	36	################################################################################\r
	37	#\r
	38	# Following are lists of FD Region layout which correspond to the locations of different\r
	39	# images within the flash device.\r
	40	#\r
	41	# Regions must be defined in ascending order and may not overlap.\r
	42	#\r
	43	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	44	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	45	# "0x" characters. Like:\r
	46	# Offset\|Size\r
	47	# PcdOffsetCName\|PcdSizeCName\r
	48	# RegionType <FV, DATA, or FILE>\r
	49	#\r
	50	################################################################################\r
	51	\r
	52	0x00000000\|0x00080000\r
	53	gArmTokenSpaceGuid.PcdSecureFvBaseAddress\|gArmTokenSpaceGuid.PcdSecureFvSize\r
	54	FV = FVMAIN_SEC\r
	55	\r
	56	0x00080000\|0x00280000\r
	57	gArmTokenSpaceGuid.PcdFvBaseAddress\|gArmTokenSpaceGuid.PcdFvSize\r
	58	FV = FVMAIN_COMPACT\r
	59	\r
	60	\r
	61	################################################################################\r
	62	#\r
	63	# FV Section\r
	64	#\r
	65	# [FV] section is used to define what components or modules are placed within a flash\r
	66	# device file. This section also defines order the components and modules are positioned\r
	67	# within the image. The [FV] section consists of define statements, set statements and\r
	68	# module statements.\r
	69	#\r
	70	################################################################################\r
	71	\r
	72	[FV.FVMAIN_SEC]\r
	73	FvAlignment = 8\r
	74	ERASE_POLARITY = 1\r
	75	MEMORY_MAPPED = TRUE\r
	76	STICKY_WRITE = TRUE\r
	77	LOCK_CAP = TRUE\r
	78	LOCK_STATUS = TRUE\r
	79	WRITE_DISABLED_CAP = TRUE\r
	80	WRITE_ENABLED_CAP = TRUE\r
	81	WRITE_STATUS = TRUE\r
	82	WRITE_LOCK_CAP = TRUE\r
	83	WRITE_LOCK_STATUS = TRUE\r
	84	READ_DISABLED_CAP = TRUE\r
	85	READ_ENABLED_CAP = TRUE\r
	86	READ_STATUS = TRUE\r
	87	READ_LOCK_CAP = TRUE\r
	88	READ_LOCK_STATUS = TRUE\r
	89	\r
	90	INF ArmPlatformPkg/Sec/Sec.inf\r
	91	\r
	92	\r
	93	[FV.FvMain]\r
	94	BlockSize = 0x40\r
	95	NumBlocks = 0 # This FV gets compressed so make it just big enough\r
	96	FvAlignment = 8 # FV alignment and FV attributes setting.\r
	97	ERASE_POLARITY = 1\r
	98	MEMORY_MAPPED = TRUE\r
99	STICKY_WRITE = TRUE\r
100	LOCK_CAP = TRUE\r
101	LOCK_STATUS = TRUE\r
102	WRITE_DISABLED_CAP = TRUE\r
103	WRITE_ENABLED_CAP = TRUE\r
104	WRITE_STATUS = TRUE\r
105	WRITE_LOCK_CAP = TRUE\r
106	WRITE_LOCK_STATUS = TRUE\r
107	READ_DISABLED_CAP = TRUE\r
108	READ_ENABLED_CAP = TRUE\r
109	READ_STATUS = TRUE\r
110	READ_LOCK_CAP = TRUE\r
111	READ_LOCK_STATUS = TRUE\r
112	\r
04f1a709 RC	113	APRIORI DXE {\r
	114	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
	115	}\r
	116	\r
3402aac7	117	INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
04f1a709	118	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
d6550260	119	\r
d6550260	120	#\r
3402aac7	121	# PI DXE Drivers producing Architectural Protocols (EFI Services)\r
d6550260	122	#\r
	123	INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
	124	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
	125	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
	126	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
	127	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
	128	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
	129	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
	130	INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
	131	INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
	132	INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
	133	\r
	134	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
3402aac7	135	\r
d6550260	136	#\r
	137	# Multiple Console IO support\r
	138	#\r
	139	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
	140	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
	141	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
	142	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
	143	INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
	144	\r
017baa1c	145	INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
d6550260	146	INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r
	147	INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
	148	INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
	149	INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
	150	\r
	151	#\r
	152	# Semi-hosting filesystem\r
	153	#\r
	154	INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
3402aac7	155	\r
94e0955d OM	156	#\r
	157	# Versatile Express FileSystem\r
	158	#\r
	159	INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r
	160	\r
d6550260	161	#\r
	162	# FAT filesystem + GPT/MBR partitioning\r
	163	#\r
	164	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	165	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
e1772adf	166	INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
d6550260	167	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
3402aac7	168	\r
53f39c6c	169	#\r
	170	# Multimedia Card Interface\r
	171	#\r
	172	INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
	173	INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
62d441fb RC	174	\r
	175	#\r
	176	# Platform Driver\r
	177	#\r
	178	INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
	179	INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
	180	\r
d6550260	181	#\r
3402aac7 RC	182	# UEFI application (Shell Embedded Boot Loader)\r
	183	#\r
	184	INF ShellBinPkg/UefiShell/UefiShell.inf\r
	185	\r
d6550260	186	#\r
	187	# Bds\r
	188	#\r
	189	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	190	INF ArmPlatformPkg/Bds/Bds.inf\r
	191	\r
901b4516 OM	192	# FV Filesystem\r
901b4516 OM	193	INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
d6550260	194	\r
f066ab4e OM	195	#\r
	196	# FDT installation\r
	197	#\r
	198	# The UEFI driver is at the end of the list of the driver to be dispatched\r
	199	# after the device drivers (eg: Ethernet) to ensure we have support for them.\r
	200	INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r
	201	\r
04f1a709 RC	202	# Example to add a Device Tree to the Firmware Volume\r
	203	#FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressFvpA9x4) {\r
	204	# SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/rtsm_ve-ca9x4.dtb\r
	205	#}\r
	206	\r
d6550260	207	[FV.FVMAIN_COMPACT]\r
	208	FvAlignment = 8\r
	209	ERASE_POLARITY = 1\r
	210	MEMORY_MAPPED = TRUE\r
	211	STICKY_WRITE = TRUE\r
	212	LOCK_CAP = TRUE\r
	213	LOCK_STATUS = TRUE\r
	214	WRITE_DISABLED_CAP = TRUE\r
	215	WRITE_ENABLED_CAP = TRUE\r
	216	WRITE_STATUS = TRUE\r
	217	WRITE_LOCK_CAP = TRUE\r
	218	WRITE_LOCK_STATUS = TRUE\r
	219	READ_DISABLED_CAP = TRUE\r
	220	READ_ENABLED_CAP = TRUE\r
	221	READ_STATUS = TRUE\r
	222	READ_LOCK_CAP = TRUE\r
	223	READ_LOCK_STATUS = TRUE\r
	224	\r
	225	!if $(EDK2_SKIP_PEICORE) == 1\r
	226	INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
	227	!else\r
	228	INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
	229	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
	230	INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
	231	INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
	232	INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
	233	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	234	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	235	INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
	236	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
	237	!endif\r
3402aac7	238	\r
d6550260	239	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
	240	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
	241	SECTION FV_IMAGE = FVMAIN\r
	242	}\r
	243	}\r
	244	\r
	245	\r
	246	################################################################################\r
	247	#\r
	248	# Rules are use with the [FV] section's module INF type to define\r
	249	# how an FFS file is created for a given INF file. The following Rule are the default\r
	250	# rules for the different module type. User can add the customized rules to define the\r
	251	# content of the FFS file.\r
	252	#\r
	253	################################################################################\r
	254	\r
	255	\r
	256	############################################################################\r
3402aac7	257	# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r
d6550260	258	############################################################################\r
	259	#\r
	260	#[Rule.Common.DXE_DRIVER]\r
	261	# FILE DRIVER = $(NAMED_GUID) {\r
	262	# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	263	# COMPRESS PI_STD {\r
	264	# GUIDED {\r
	265	# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	266	# UI STRING="$(MODULE_NAME)" Optional\r
	267	# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	268	# }\r
	269	# }\r
	270	# }\r
	271	#\r
	272	############################################################################\r
	273	\r
	274	[Rule.Common.SEC]\r
	275	FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
	276	TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	277	}\r
	278	\r
	279	[Rule.Common.PEI_CORE]\r
	280	FILE PEI_CORE = $(NAMED_GUID) {\r
	281	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
3402aac7	282	UI STRING ="$(MODULE_NAME)" Optional\r
d6550260	283	}\r
	284	\r
	285	[Rule.Common.PEIM]\r
	286	FILE PEIM = $(NAMED_GUID) {\r
	287	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	288	TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
3402aac7	289	UI STRING="$(MODULE_NAME)" Optional\r
d6550260	290	}\r
	291	\r
	292	[Rule.Common.PEIM.TIANOCOMPRESSED]\r
	293	FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
	294	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	295	GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
	296	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	297	UI STRING="$(MODULE_NAME)" Optional\r
	298	}\r
	299	}\r
	300	\r
	301	[Rule.Common.DXE_CORE]\r
	302	FILE DXE_CORE = $(NAMED_GUID) {\r
	303	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	304	UI STRING="$(MODULE_NAME)" Optional\r
	305	}\r
	306	\r
	307	[Rule.Common.UEFI_DRIVER]\r
	308	FILE DRIVER = $(NAMED_GUID) {\r
	309	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	310	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	311	UI STRING="$(MODULE_NAME)" Optional\r
	312	}\r
	313	\r
	314	[Rule.Common.DXE_DRIVER]\r
	315	FILE DRIVER = $(NAMED_GUID) {\r
	316	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	317	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	318	UI STRING="$(MODULE_NAME)" Optional\r
	319	}\r
	320	\r
	321	[Rule.Common.DXE_RUNTIME_DRIVER]\r
	322	FILE DRIVER = $(NAMED_GUID) {\r
	323	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	324	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	325	UI STRING="$(MODULE_NAME)" Optional\r
	326	}\r
	327	\r
	328	[Rule.Common.UEFI_APPLICATION]\r
	329	FILE APPLICATION = $(NAMED_GUID) {\r
3402aac7	330	UI STRING ="$(MODULE_NAME)" Optional\r
d6550260	331	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
d6550260	332	}\r
e1772adf	333	\r
	334	[Rule.Common.UEFI_DRIVER.BINARY]\r
	335	FILE DRIVER = $(NAMED_GUID) {\r
	336	DXE_DEPEX DXE_DEPEX Optional \|.depex\r
	337	PE32 PE32 \|.efi\r
	338	UI STRING="$(MODULE_NAME)" Optional\r
	339	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	340	}\r
	341	\r
	342	[Rule.Common.UEFI_APPLICATION.BINARY]\r
	343	FILE APPLICATION = $(NAMED_GUID) {\r
	344	PE32 PE32 \|.efi\r
	345	UI STRING="$(MODULE_NAME)" Optional\r
	346	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	347	}\r