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1 | //\r |
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2 | // Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r |
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3 | //\r |
| 4 | // This program and the accompanying materials\r |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r |
| 7 | // http://opensource.org/licenses/bsd-license.php\r |
| 8 | //\r |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 11 | //\r |
| 12 | //\r |
| 13 | \r |
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14 | #include <AsmMacroIoLib.h>\r |
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15 | #include <Library/ArmLib.h>\r |
| 16 | \r |
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17 | #include <ArmPlatform.h>\r |
| 18 | \r |
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19 | .text \r |
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20 | .align 2\r |
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21 | \r |
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22 | GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r |
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23 | GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r |
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24 | GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r |
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25 | \r |
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26 | ASM_PFX(ArmPlatformPeiBootAction):\r |
| 27 | bx lr\r |
| 28 | \r |
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29 | //UINTN\r |
| 30 | //ArmPlatformGetCorePosition (\r |
| 31 | // IN UINTN MpId\r |
| 32 | // );\r |
| 33 | ASM_PFX(ArmPlatformGetCorePosition):\r |
| 34 | and r1, r0, #ARM_CORE_MASK\r |
| 35 | and r0, r0, #ARM_CLUSTER_MASK\r |
| 36 | add r0, r1, r0, LSR #7\r |
| 37 | bx lr\r |
| 38 | \r |
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39 | //UINTN\r |
| 40 | //ArmPlatformIsPrimaryCore (\r |
| 41 | // IN UINTN MpId\r |
| 42 | // );\r |
| 43 | ASM_PFX(ArmPlatformIsPrimaryCore):\r |
| 44 | // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r |
| 45 | // with cpu_id[0:3] and cluster_id[4:7]\r |
| 46 | LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)\r |
| 47 | ldr r1, [r1]\r |
| 48 | lsr r1, #24\r |
| 49 | \r |
| 50 | // Shift the SCC value to get the cluster ID at the offset #8\r |
| 51 | lsl r2, r1, #4\r |
| 52 | and r2, r2, #0xF00\r |
| 53 | \r |
| 54 | // Keep only the cpu ID from the original SCC\r |
| 55 | and r1, r1, #0x0F\r |
| 56 | // Add the Cluster ID to the Cpu ID\r |
| 57 | orr r1, r1, r2\r |
| 58 | \r |
| 59 | // Keep the Cluster ID and Core ID from the MPID\r |
| 60 | LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)\r |
| 61 | and r0, r0, r2\r |
| 62 | \r |
| 63 | // Compare mpid and boot cpu from ARM_SCC_CFGREG48\r |
| 64 | cmp r0, r1\r |
| 65 | moveq r0, #1\r |
| 66 | movne r0, #0\r |
| 67 | bx lr\r |
| 68 | \r |
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