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1ddb209e | 1 | /** @file |
2 | * | |
f437141a | 3 | * Copyright (c) 2011-2012, ARM Limited. All rights reserved. |
1ddb209e | 4 | * |
5 | * This program and the accompanying materials | |
6 | * are licensed and made available under the terms and conditions of the BSD License | |
7 | * which accompanies this distribution. The full text of the license may be found at | |
8 | * http://opensource.org/licenses/bsd-license.php | |
9 | * | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | * | |
13 | **/ | |
14 | ||
15 | #include <Library/IoLib.h> | |
16 | #include <Library/ArmPlatformLib.h> | |
17 | #include <Library/DebugLib.h> | |
18 | #include <Library/PcdLib.h> | |
19 | ||
1ddb209e | 20 | #include <Ppi/ArmMpCoreInfo.h> |
21 | ||
22 | #include <ArmPlatform.h> | |
23 | ||
12c5ae23 | 24 | UINTN |
25 | ArmGetCpuCountPerCluster ( | |
26 | VOID | |
27 | ); | |
28 | ||
1ddb209e | 29 | ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = { |
30 | { | |
31 | // Cluster 0, Core 0 | |
32 | 0x0, 0x0, | |
33 | ||
34 | // MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
35 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
36 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
37 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
38 | (UINT64)0xFFFFFFFF | |
39 | }, | |
40 | { | |
41 | // Cluster 0, Core 1 | |
42 | 0x0, 0x1, | |
43 | ||
44 | // MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
45 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
46 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
47 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
48 | (UINT64)0xFFFFFFFF | |
49 | }, | |
50 | { | |
51 | // Cluster 0, Core 2 | |
52 | 0x0, 0x2, | |
53 | ||
54 | // MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
55 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
56 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
57 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
58 | (UINT64)0xFFFFFFFF | |
59 | }, | |
60 | { | |
61 | // Cluster 0, Core 3 | |
62 | 0x0, 0x3, | |
63 | ||
64 | // MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
65 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
66 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
67 | (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
68 | (UINT64)0xFFFFFFFF | |
69 | } | |
70 | }; | |
71 | ||
1ddb209e | 72 | /** |
73 | Return the current Boot Mode | |
74 | ||
75 | This function returns the boot reason on the platform | |
76 | ||
77 | @return Return the current Boot Mode of the platform | |
78 | ||
79 | **/ | |
80 | EFI_BOOT_MODE | |
81 | ArmPlatformGetBootMode ( | |
82 | VOID | |
83 | ) | |
84 | { | |
85 | return BOOT_WITH_FULL_CONFIGURATION; | |
86 | } | |
87 | ||
1ddb209e | 88 | /** |
89 | Initialize controllers that must setup in the normal world | |
90 | ||
91 | This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim | |
92 | in the PEI phase. | |
93 | ||
94 | **/ | |
f437141a | 95 | RETURN_STATUS |
96 | ArmPlatformInitialize ( | |
97 | IN UINTN MpId | |
1ddb209e | 98 | ) |
99 | { | |
f437141a | 100 | if (!IS_PRIMARY_CORE(MpId)) { |
101 | return RETURN_SUCCESS; | |
102 | } | |
103 | ||
8d0fe26c | 104 | // Disable memory remapping and return to normal mapping |
105 | MmioOr32 (SP810_CTRL_BASE, BIT8); | |
f437141a | 106 | |
107 | return RETURN_SUCCESS; | |
1ddb209e | 108 | } |
109 | ||
110 | /** | |
111 | Initialize the system (or sometimes called permanent) memory | |
112 | ||
113 | This memory is generally represented by the DRAM. | |
114 | ||
115 | **/ | |
116 | VOID | |
117 | ArmPlatformInitializeSystemMemory ( | |
118 | VOID | |
119 | ) | |
120 | { | |
d17afc8a | 121 | // Nothing to do here |
1ddb209e | 122 | } |
123 | ||
124 | EFI_STATUS | |
125 | PrePeiCoreGetMpCoreInfo ( | |
126 | OUT UINTN *CoreCount, | |
127 | OUT ARM_CORE_INFO **ArmCoreTable | |
128 | ) | |
129 | { | |
130 | UINT32 ProcType; | |
131 | ||
132 | ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK; | |
88d4f51d | 133 | if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) { |
1ddb209e | 134 | // Only support one cluster |
135 | *CoreCount = ArmGetCpuCountPerCluster (); | |
136 | *ArmCoreTable = mVersatileExpressMpCoreInfoTable; | |
137 | return EFI_SUCCESS; | |
138 | } else { | |
139 | return EFI_UNSUPPORTED; | |
140 | } | |
141 | } | |
142 | ||
143 | // Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore | |
144 | EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; | |
145 | ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; | |
146 | ||
147 | EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { | |
148 | { | |
149 | EFI_PEI_PPI_DESCRIPTOR_PPI, | |
150 | &mArmMpCoreInfoPpiGuid, | |
151 | &mMpCoreInfoPpi | |
152 | } | |
153 | }; | |
154 | ||
155 | VOID | |
156 | ArmPlatformGetPlatformPpiList ( | |
157 | OUT UINTN *PpiListSize, | |
158 | OUT EFI_PEI_PPI_DESCRIPTOR **PpiList | |
159 | ) | |
160 | { | |
161 | *PpiListSize = sizeof(gPlatformPpiTable); | |
162 | *PpiList = gPlatformPpiTable; | |
163 | } |