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1e57a462 | 1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r | |
4 | * \r | |
5 | * This program and the accompanying materials \r | |
6 | * are licensed and made available under the terms and conditions of the BSD License \r | |
7 | * which accompanies this distribution. The full text of the license may be found at \r | |
8 | * http://opensource.org/licenses/bsd-license.php \r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #include <Library/IoLib.h>\r | |
16 | #include <Library/ArmPlatformLib.h>\r | |
17 | #include <Library/DebugLib.h>\r | |
18 | #include <Library/PcdLib.h>\r | |
19 | \r | |
20 | #include <Drivers/PL310L2Cache.h>\r | |
21 | #include <Drivers/SP804Timer.h>\r | |
22 | \r | |
23 | #include <ArmPlatform.h>\r | |
24 | \r | |
25 | /**\r | |
26 | Initialize the Secure peripherals and memory regions\r | |
27 | \r | |
28 | If Trustzone is supported by your platform then this function makes the required initialization\r | |
29 | of the secure peripherals and memory regions.\r | |
30 | \r | |
31 | **/\r | |
32 | VOID\r | |
33 | ArmPlatformSecTrustzoneInit (\r | |
34 | IN UINTN MpId\r | |
35 | )\r | |
36 | {\r | |
37 | // No TZPC or TZASC on RTSM to initialize\r | |
38 | }\r | |
39 | \r | |
40 | /**\r | |
41 | Initialize controllers that must setup at the early stage\r | |
42 | \r | |
43 | Some peripherals must be initialized in Secure World.\r | |
44 | For example, some L2x0 requires to be initialized in Secure World\r | |
45 | \r | |
46 | **/\r | |
47 | RETURN_STATUS\r | |
48 | ArmPlatformSecInitialize (\r | |
49 | IN UINTN MpId\r | |
50 | )\r | |
51 | {\r | |
52 | // If it is not the primary core then there is nothing to do\r | |
53 | if (!IS_PRIMARY_CORE(MpId)) {\r | |
54 | return RETURN_SUCCESS;\r | |
55 | }\r | |
56 | \r | |
57 | // Configure periodic timer (TIMER0) for 1MHz operation\r | |
58 | MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);\r | |
59 | // Configure 1MHz clock\r | |
60 | MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);\r | |
61 | // Configure SP810 to use 1MHz clock and disable\r | |
62 | MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r | |
63 | // Configure SP810 to use 1MHz clock and disable\r | |
64 | MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);\r | |
65 | \r | |
66 | return RETURN_SUCCESS;\r | |
67 | }\r | |
68 | \r | |
69 | /**\r | |
70 | Call before jumping to Normal World\r | |
71 | \r | |
72 | This function allows the firmware platform to do extra actions before\r | |
73 | jumping to the Normal World\r | |
74 | \r | |
75 | **/\r | |
76 | VOID\r | |
77 | ArmPlatformSecExtraAction (\r | |
78 | IN UINTN MpId,\r | |
79 | OUT UINTN* JumpAddress\r | |
80 | )\r | |
81 | {\r | |
82 | *JumpAddress = PcdGet32(PcdFvBaseAddress);\r | |
83 | }\r |