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ArmPlatformPkg/LcdGraphicsOutputDxe: remove VExpressPkg dependency
[mirror_edk2.git] / ArmPlatformPkg / Drivers / LcdGraphicsOutputDxe / HdLcd.c
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f8c9f1c1 1/** @file Lcd.c\r
2\r
3 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
4\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include <Library/DebugLib.h>\r
16#include <Library/IoLib.h>\r
17#include <Library/LcdPlatformLib.h>\r
18#include <Library/MemoryAllocationLib.h>\r
19#include <Library/PcdLib.h>\r
20\r
21#include <Drivers/HdLcd.h>\r
22\r
23#include "LcdGraphicsOutputDxe.h"\r
24\r
25/**********************************************************************\r
26 *\r
27 * This file contains all the bits of the Lcd that are\r
28 * platform independent.\r
29 *\r
30 **********************************************************************/\r
31\r
32EFI_STATUS\r
33LcdInitialize (\r
34 IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
35 )\r
36{\r
37 // Disable the controller\r
38 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
39\r
40 // Disable all interrupts\r
41 MmioWrite32(HDLCD_REG_INT_MASK, 0);\r
42\r
43 // Define start of the VRAM. This never changes for any graphics mode\r
44 MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);\r
45\r
46 // Setup various registers that never change\r
47 MmioWrite32(HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);\r
48 MmioWrite32(HDLCD_REG_POLARITIES, HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);\r
49 MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);\r
50 MmioWrite32(HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0));\r
51 MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));\r
52 MmioWrite32(HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16));\r
53\r
54 return EFI_SUCCESS;\r
55}\r
56\r
57EFI_STATUS\r
58LcdSetMode (\r
59 IN UINT32 ModeNumber\r
60 )\r
61{\r
62 EFI_STATUS Status;\r
63 UINT32 HRes;\r
64 UINT32 HSync;\r
65 UINT32 HBackPorch;\r
66 UINT32 HFrontPorch;\r
67 UINT32 VRes;\r
68 UINT32 VSync;\r
69 UINT32 VBackPorch;\r
70 UINT32 VFrontPorch;\r
71 UINT32 BytesPerPixel;\r
72 LCD_BPP LcdBpp;\r
73\r
74\r
75 // Set the video mode timings and other relevant information\r
76 Status = LcdPlatformGetTimings (ModeNumber,\r
77 &HRes,&HSync,&HBackPorch,&HFrontPorch,\r
78 &VRes,&VSync,&VBackPorch,&VFrontPorch);\r
79 ASSERT_EFI_ERROR (Status);\r
80 if (EFI_ERROR( Status )) {\r
81 return EFI_DEVICE_ERROR;\r
82 }\r
83\r
84 Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);\r
85 ASSERT_EFI_ERROR (Status);\r
86 if (EFI_ERROR( Status )) {\r
87 return EFI_DEVICE_ERROR;\r
88 }\r
89\r
90 BytesPerPixel = GetBytesPerPixel(LcdBpp);\r
91\r
92 // Disable the controller\r
93 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
94\r
95 // Update the frame buffer information with the new settings\r
96 MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);\r
97 MmioWrite32(HDLCD_REG_FB_LINE_PITCH, HRes * BytesPerPixel);\r
98 MmioWrite32(HDLCD_REG_FB_LINE_COUNT, VRes - 1);\r
99\r
100 // Set the vertical timing information\r
101 MmioWrite32(HDLCD_REG_V_SYNC, VSync);\r
102 MmioWrite32(HDLCD_REG_V_BACK_PORCH, VBackPorch);\r
103 MmioWrite32(HDLCD_REG_V_DATA, VRes - 1);\r
104 MmioWrite32(HDLCD_REG_V_FRONT_PORCH, VFrontPorch);\r
105\r
106 // Set the horizontal timing information\r
107 MmioWrite32(HDLCD_REG_H_SYNC, HSync);\r
108 MmioWrite32(HDLCD_REG_H_BACK_PORCH, HBackPorch);\r
109 MmioWrite32(HDLCD_REG_H_DATA, HRes - 1);\r
110 MmioWrite32(HDLCD_REG_H_FRONT_PORCH, HFrontPorch);\r
111\r
112 // Enable the controller\r
113 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
114\r
115 return EFI_SUCCESS;\r
116}\r
117\r
118VOID\r
119LcdShutdown (\r
120 VOID\r
121 )\r
122{\r
d8c4bb9a
OM
123 // Disable the controller\r
124 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
f8c9f1c1 125}\r
5fe98716
AB
126\r
127EFI_STATUS\r
128LcdIdentify (\r
129 VOID\r
130 )\r
131{\r
132 return EFI_SUCCESS;\r
133}\r