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33e7c2ab | 1 | /** @file |
2 | * | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved. | |
4 | * | |
5 | * This program and the accompanying materials | |
6 | * are licensed and made available under the terms and conditions of the BSD License | |
7 | * which accompanies this distribution. The full text of the license may be found at | |
8 | * http://opensource.org/licenses/bsd-license.php | |
9 | * | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | * | |
13 | **/ | |
14 | ||
15 | ||
16 | #include <PiDxe.h> | |
17 | ||
18 | #include <Library/BaseLib.h> | |
33e7c2ab | 19 | #include <Library/BaseMemoryLib.h> |
5cc45b70 | 20 | #include <Library/DebugLib.h> |
21 | #include <Library/IoLib.h> | |
22 | #include <Library/PcdLib.h> | |
33e7c2ab | 23 | #include <Library/UefiBootServicesTableLib.h> |
24 | #include <Library/UefiRuntimeServicesTableLib.h> | |
25 | #include <Library/UefiLib.h> | |
33e7c2ab | 26 | |
27 | #include <Protocol/WatchdogTimer.h> | |
33e7c2ab | 28 | #include <Drivers/SP805Watchdog.h> |
29 | ||
33e7c2ab | 30 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; |
31 | ||
32 | BOOLEAN mSP805Initialized = FALSE; | |
33 | ||
34 | EFI_STATUS | |
35 | SP805Identify ( | |
36 | VOID | |
37 | ) | |
38 | { | |
39 | // Check if this is a PrimeCell Peripheral | |
5cc45b70 | 40 | if ( (MmioRead8 (SP805_WDOG_PCELL_ID0) != 0x0D) |
41 | || (MmioRead8 (SP805_WDOG_PCELL_ID1) != 0xF0) | |
42 | || (MmioRead8 (SP805_WDOG_PCELL_ID2) != 0x05) | |
43 | || (MmioRead8 (SP805_WDOG_PCELL_ID3) != 0xB1)) { | |
33e7c2ab | 44 | return EFI_NOT_FOUND; |
45 | } | |
46 | ||
47 | // Check if this PrimeCell Peripheral is the SP805 Watchdog Timer | |
5cc45b70 | 48 | if ( (MmioRead8 (SP805_WDOG_PERIPH_ID0) != 0x05) |
49 | || (MmioRead8 (SP805_WDOG_PERIPH_ID1) != 0x18) | |
50 | || ((MmioRead8 (SP805_WDOG_PERIPH_ID2) & 0x0000000F) != 0x04) | |
51 | || (MmioRead8 (SP805_WDOG_PERIPH_ID3) != 0x00)) { | |
33e7c2ab | 52 | return EFI_NOT_FOUND; |
53 | } | |
54 | ||
55 | return EFI_SUCCESS; | |
56 | } | |
57 | ||
58 | /** | |
59 | Make sure the SP805 registers are unlocked for writing. | |
60 | ||
61 | Note: The SP805 Watchdog Timer supports locking of its registers, | |
62 | i.e. it inhibits all writes to avoid rogue software accidentally | |
63 | corrupting their contents. | |
64 | **/ | |
65 | inline | |
66 | VOID | |
67 | SP805Unlock ( | |
68 | VOID | |
69 | ) | |
70 | { | |
71 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) { | |
72 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); | |
73 | } | |
74 | } | |
75 | ||
76 | /** | |
77 | Make sure the SP805 registers are locked and can not be overwritten. | |
78 | ||
79 | Note: The SP805 Watchdog Timer supports locking of its registers, | |
80 | i.e. it inhibits all writes to avoid rogue software accidentally | |
81 | corrupting their contents. | |
82 | **/ | |
83 | inline | |
84 | VOID | |
85 | SP805Lock ( | |
86 | VOID | |
87 | ) | |
88 | { | |
89 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) { | |
90 | // To lock it, just write in any number (except the special unlock code). | |
91 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); | |
92 | } | |
93 | } | |
94 | ||
95 | /** | |
96 | Stop the SP805 watchdog timer from counting down by disabling interrupts. | |
97 | **/ | |
98 | inline | |
99 | VOID | |
100 | SP805Stop ( | |
101 | VOID | |
102 | ) | |
103 | { | |
104 | // Disable interrupts | |
105 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) { | |
106 | MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); | |
107 | } | |
108 | } | |
109 | ||
110 | /** | |
111 | Starts the SP805 counting down by enabling interrupts. | |
112 | The count down will start from the value stored in the Load register, | |
113 | not from the value where it was previously stopped. | |
114 | **/ | |
115 | inline | |
116 | VOID | |
117 | SP805Start ( | |
118 | VOID | |
119 | ) | |
120 | { | |
121 | // Enable interrupts | |
122 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { | |
123 | MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); | |
124 | } | |
125 | } | |
126 | ||
127 | /** | |
128 | On exiting boot services we must make sure the SP805 Watchdog Timer | |
129 | is stopped. | |
130 | **/ | |
131 | VOID | |
132 | EFIAPI | |
133 | ExitBootServicesEvent ( | |
134 | IN EFI_EVENT Event, | |
135 | IN VOID *Context | |
136 | ) | |
137 | { | |
138 | SP805Unlock(); | |
139 | SP805Stop(); | |
140 | SP805Lock(); | |
141 | } | |
142 | ||
143 | /** | |
144 | This function registers the handler NotifyFunction so it is called every time | |
145 | the watchdog timer expires. It also passes the amount of time since the last | |
146 | handler call to the NotifyFunction. | |
147 | If NotifyFunction is not NULL and a handler is not already registered, | |
148 | then the new handler is registered and EFI_SUCCESS is returned. | |
149 | If NotifyFunction is NULL, and a handler is already registered, | |
150 | then that handler is unregistered. | |
151 | If an attempt is made to register a handler when a handler is already registered, | |
152 | then EFI_ALREADY_STARTED is returned. | |
153 | If an attempt is made to unregister a handler when a handler is not registered, | |
154 | then EFI_INVALID_PARAMETER is returned. | |
155 | ||
156 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
157 | @param NotifyFunction The function to call when a timer interrupt fires. This | |
158 | function executes at TPL_HIGH_LEVEL. The DXE Core will | |
159 | register a handler for the timer interrupt, so it can know | |
160 | how much time has passed. This information is used to | |
161 | signal timer based events. NULL will unregister the handler. | |
162 | ||
163 | @retval EFI_SUCCESS The watchdog timer handler was registered. | |
164 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already | |
165 | registered. | |
166 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not | |
167 | previously registered. | |
168 | ||
169 | **/ | |
170 | EFI_STATUS | |
171 | EFIAPI | |
172 | SP805RegisterHandler ( | |
173 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, | |
174 | IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction | |
175 | ) | |
176 | { | |
177 | // ERROR: This function is not supported. | |
178 | // The hardware watchdog will reset the board | |
179 | return EFI_INVALID_PARAMETER; | |
180 | } | |
181 | ||
182 | /** | |
183 | ||
184 | This function adjusts the period of timer interrupts to the value specified | |
185 | by TimerPeriod. If the timer period is updated, then the selected timer | |
186 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If | |
187 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. | |
188 | If an error occurs while attempting to update the timer period, then the | |
189 | timer hardware will be put back in its state prior to this call, and | |
190 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt | |
191 | is disabled. This is not the same as disabling the CPU's interrupts. | |
192 | Instead, it must either turn off the timer hardware, or it must adjust the | |
193 | interrupt controller so that a CPU interrupt is not generated when the timer | |
194 | interrupt fires. | |
195 | ||
196 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
197 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If | |
198 | the timer hardware is not programmable, then EFI_UNSUPPORTED is | |
199 | returned. If the timer is programmable, then the timer period | |
200 | will be rounded up to the nearest timer period that is supported | |
201 | by the timer hardware. If TimerPeriod is set to 0, then the | |
202 | timer interrupts will be disabled. | |
203 | ||
204 | ||
205 | @retval EFI_SUCCESS The timer period was changed. | |
206 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. | |
207 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. | |
208 | ||
209 | **/ | |
210 | EFI_STATUS | |
211 | EFIAPI | |
212 | SP805SetTimerPeriod ( | |
213 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, | |
214 | IN UINT64 TimerPeriod // In 100ns units | |
215 | ) | |
216 | { | |
217 | EFI_STATUS Status = EFI_SUCCESS; | |
218 | UINT64 Ticks64bit; | |
219 | ||
220 | // Initialize the hardware if not already done | |
221 | if( !mSP805Initialized ) { | |
222 | Status = SP805Initialize(); | |
223 | if (EFI_ERROR(Status)) { | |
224 | goto EXIT; | |
225 | } | |
226 | } | |
227 | ||
228 | SP805Unlock(); | |
229 | ||
230 | if( TimerPeriod == 0 ) { | |
231 | // This is a watchdog stop request | |
232 | SP805Stop(); | |
233 | goto EXIT; | |
234 | } else { | |
235 | // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds | |
236 | // The SP805 will count down to ZERO once, generate an interrupt and | |
237 | // then it will again reload the initial value and start again. | |
238 | // On the second time when it reaches ZERO, it will actually reset the board. | |
239 | // Therefore, we need to load half the required delay. | |
240 | // | |
241 | // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ; | |
242 | // | |
243 | // i.e.: | |
244 | // | |
245 | // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ; | |
246 | ||
3723a71a | 247 | Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000); |
33e7c2ab | 248 | |
249 | // The registers in the SP805 are only 32 bits | |
3723a71a | 250 | if(Ticks64bit > (UINT64)0xFFFFFFFF) { |
33e7c2ab | 251 | // We could load the watchdog with the maximum supported value but |
252 | // if a smaller value was requested, this could have the watchdog | |
253 | // triggering before it was intended. | |
254 | // Better generate an error to let the caller know. | |
255 | Status = EFI_DEVICE_ERROR; | |
256 | goto EXIT; | |
257 | } | |
258 | ||
259 | // Update the watchdog with a 32-bit value. | |
260 | MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); | |
261 | ||
262 | // Start the watchdog | |
263 | SP805Start(); | |
264 | } | |
265 | ||
266 | EXIT: | |
267 | // Ensure the watchdog is locked before exiting. | |
268 | SP805Lock(); | |
269 | return Status; | |
270 | } | |
271 | ||
272 | /** | |
273 | This function retrieves the period of timer interrupts in 100 ns units, | |
274 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod | |
275 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is | |
276 | returned, then the timer is currently disabled. | |
277 | ||
278 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
279 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If | |
280 | 0 is returned, then the timer is currently disabled. | |
281 | ||
282 | ||
283 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod. | |
284 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. | |
285 | ||
286 | **/ | |
287 | EFI_STATUS | |
288 | EFIAPI | |
289 | SP805GetTimerPeriod ( | |
290 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, | |
291 | OUT UINT64 *TimerPeriod | |
292 | ) | |
293 | { | |
294 | EFI_STATUS Status = EFI_SUCCESS; | |
295 | UINT64 ReturnValue; | |
296 | ||
297 | if (TimerPeriod == NULL) { | |
298 | return EFI_INVALID_PARAMETER; | |
299 | } | |
300 | ||
301 | // Initialize the hardware if not already done | |
302 | if( !mSP805Initialized ) { | |
303 | Status = SP805Initialize(); | |
304 | if (EFI_ERROR(Status)) { | |
305 | goto EXIT; | |
306 | } | |
307 | } | |
308 | ||
309 | // Check if the watchdog is stopped | |
310 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { | |
311 | // It is stopped, so return zero. | |
312 | ReturnValue = 0; | |
313 | } else { | |
314 | // Convert the Watchdog ticks into TimerPeriod | |
315 | // Ensure 64bit arithmetic throughout because the Watchdog ticks may already | |
316 | // be at the maximum 32 bit value and we still need to multiply that by 600. | |
317 | ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 ); | |
318 | } | |
319 | ||
320 | *TimerPeriod = ReturnValue; | |
321 | ||
33e7c2ab | 322 | return Status; |
323 | } | |
324 | ||
a12da33b | 325 | /** |
326 | Interface structure for the Watchdog Architectural Protocol. | |
327 | ||
328 | @par Protocol Description: | |
329 | This protocol provides a service to set the amount of time to wait | |
330 | before firing the watchdog timer, and it also provides a service to | |
331 | register a handler that is invoked when the watchdog timer fires. | |
332 | ||
333 | @par When the watchdog timer fires, control will be passed to a handler | |
334 | if one has been registered. If no handler has been registered, | |
335 | or the registered handler returns, then the system will be | |
336 | reset by calling the Runtime Service ResetSystem(). | |
337 | ||
338 | @param RegisterHandler | |
339 | Registers a handler that will be called each time the | |
340 | watchdogtimer interrupt fires. TimerPeriod defines the minimum | |
341 | time between timer interrupts, so TimerPeriod will also | |
342 | be the minimum time between calls to the registered | |
343 | handler. | |
344 | NOTE: If the watchdog resets the system in hardware, then | |
345 | this function will not have any chance of executing. | |
346 | ||
347 | @param SetTimerPeriod | |
348 | Sets the period of the timer interrupt in 100 nS units. | |
349 | This function is optional, and may return EFI_UNSUPPORTED. | |
350 | If this function is supported, then the timer period will | |
351 | be rounded up to the nearest supported timer period. | |
352 | ||
353 | @param GetTimerPeriod | |
354 | Retrieves the period of the timer interrupt in 100 nS units. | |
355 | ||
356 | **/ | |
357 | EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { | |
358 | (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler, | |
359 | (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod, | |
360 | (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod | |
361 | }; | |
362 | ||
33e7c2ab | 363 | /** |
364 | Initialize the state information for the Watchdog Timer Architectural Protocol. | |
365 | ||
366 | @param ImageHandle of the loaded driver | |
367 | @param SystemTable Pointer to the System Table | |
368 | ||
369 | @retval EFI_SUCCESS Protocol registered | |
370 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure | |
371 | @retval EFI_DEVICE_ERROR Hardware problems | |
372 | ||
373 | **/ | |
374 | EFI_STATUS | |
375 | SP805Initialize ( | |
376 | VOID | |
377 | ) | |
378 | { | |
379 | EFI_STATUS Status; | |
380 | ||
381 | // Check if the SP805 hardware watchdog module exists on board | |
382 | Status = SP805Identify(); | |
a12da33b | 383 | if (EFI_ERROR(Status)) { |
33e7c2ab | 384 | Status = EFI_DEVICE_ERROR; |
385 | goto EXIT; | |
386 | } | |
387 | ||
388 | // Unlock access to the SP805 registers | |
a12da33b | 389 | SP805Unlock (); |
33e7c2ab | 390 | |
391 | // Stop the watchdog from triggering unexpectedly | |
a12da33b | 392 | SP805Stop (); |
33e7c2ab | 393 | |
394 | // Set the watchdog to reset the board when triggered | |
a12da33b | 395 | if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { |
396 | MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN); | |
33e7c2ab | 397 | } |
398 | ||
399 | // Prohibit any rogue access to SP805 registers | |
400 | SP805Lock(); | |
401 | ||
402 | mSP805Initialized = TRUE; | |
403 | ||
404 | EXIT: | |
405 | return Status; | |
406 | } | |
407 | ||
408 | EFI_STATUS | |
409 | EFIAPI | |
410 | SP805InstallProtocol ( | |
411 | IN EFI_HANDLE ImageHandle, | |
412 | IN EFI_SYSTEM_TABLE *SystemTable | |
413 | ) | |
414 | { | |
415 | EFI_STATUS Status; | |
416 | EFI_HANDLE Handle; | |
417 | ||
418 | // | |
419 | // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. | |
420 | // This will avoid conflicts with the universal watchdog | |
421 | // | |
422 | ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid); | |
423 | ||
424 | // Register for an ExitBootServicesEvent | |
425 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); | |
426 | if (EFI_ERROR(Status)) { | |
427 | Status = EFI_OUT_OF_RESOURCES; | |
428 | goto EXIT; | |
429 | } | |
430 | ||
431 | // Install the Timer Architectural Protocol onto a new handle | |
432 | Handle = NULL; | |
433 | Status = gBS->InstallMultipleProtocolInterfaces( | |
434 | &Handle, | |
435 | &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, | |
436 | NULL | |
437 | ); | |
438 | if (EFI_ERROR(Status)) { | |
439 | Status = EFI_OUT_OF_RESOURCES; | |
440 | goto EXIT; | |
441 | } | |
442 | ||
443 | EXIT: | |
444 | if(EFI_ERROR(Status)) { | |
445 | // The watchdog failed to initialize | |
446 | ASSERT(FALSE); | |
447 | } | |
448 | return Status; | |
449 | } |