]>
Commit | Line | Data |
---|---|---|
1bc83266 | 1 | //\r |
51ad04cb | 2 | // Copyright (c) 2012-2014, ARM Limited. All rights reserved.\r |
1bc83266 HL |
3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
51ad04cb | 14 | #include <AsmMacroIoLibV8.h>\r |
1bc83266 HL |
15 | #include <Base.h>\r |
16 | #include <AutoGen.h>\r | |
17 | \r | |
18 | .text\r | |
19 | .align 3\r | |
20 | \r | |
21 | GCC_ASM_EXPORT(ArmPlatformStackSet)\r | |
22 | GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)\r | |
23 | GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)\r | |
24 | \r | |
25 | GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r | |
26 | GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r | |
27 | GCC_ASM_IMPORT(ArmPlatformGetPrimaryCoreMpId)\r | |
28 | \r | |
29 | GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)\r | |
30 | \r | |
31 | //VOID\r | |
32 | //ArmPlatformStackSet (\r | |
33 | // IN UINTN StackBase,\r | |
34 | // IN UINTN MpId,\r | |
35 | // IN UINTN PrimaryStackSize,\r | |
36 | // IN UINTN SecondaryStackSize\r | |
37 | // );\r | |
38 | ASM_PFX(ArmPlatformStackSet):\r | |
39 | // Save parameters\r | |
40 | mov x6, x3\r | |
41 | mov x5, x2\r | |
42 | mov x4, x1\r | |
43 | mov x3, x0\r | |
44 | \r | |
45 | // Save the Link register\r | |
46 | mov x7, x30\r | |
47 | \r | |
48 | // Identify Stack\r | |
49 | mov x0, x1\r | |
50 | bl ASM_PFX(ArmPlatformIsPrimaryCore)\r | |
51 | cmp x0, #1\r | |
52 | \r | |
53 | // Restore parameters\r | |
54 | mov x0, x3\r | |
55 | mov x1, x4\r | |
56 | mov x2, x5\r | |
57 | mov x3, x6\r | |
58 | \r | |
59 | // Restore the Link register\r | |
60 | mov x30, x7\r | |
61 | \r | |
62 | // Should be ASM_PFX(ArmPlatformStackSetPrimary) but generate linker error 'unsupported ELF EM_AARCH64'\r | |
63 | b.eq ArmPlatformStackSetPrimaryL\r | |
64 | // Should be ASM_PFX(ArmPlatformStackSetSecondary) but generate linker error 'unsupported ELF EM_AARCH64'\r | |
65 | b.ne ArmPlatformStackSetSecondaryL\r | |
66 | \r | |
67 | //VOID\r | |
68 | //ArmPlatformStackSetPrimary (\r | |
69 | // IN UINTN StackBase,\r | |
70 | // IN UINTN MpId,\r | |
71 | // IN UINTN PrimaryStackSize,\r | |
72 | // IN UINTN SecondaryStackSize\r | |
73 | // );\r | |
74 | ArmPlatformStackSetPrimaryL:\r | |
75 | ASM_PFX(ArmPlatformStackSetPrimary):\r | |
76 | // Save the Link register\r | |
77 | mov x4, x30\r | |
78 | \r | |
79 | // Add stack of primary stack to StackBase\r | |
80 | add x0, x0, x2\r | |
81 | \r | |
82 | // Compute SecondaryCoresCount * SecondaryCoreStackSize\r | |
83 | LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x1)\r | |
84 | ldr w1, [x1]\r | |
85 | sub x1, x1, #1\r | |
86 | mul x3, x3, x1\r | |
87 | \r | |
88 | // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))\r | |
89 | add sp, x0, x3\r | |
90 | \r | |
91 | br x4\r | |
92 | \r | |
93 | //VOID\r | |
94 | //ArmPlatformStackSetSecondary (\r | |
95 | // IN UINTN StackBase,\r | |
96 | // IN UINTN MpId,\r | |
97 | // IN UINTN PrimaryStackSize,\r | |
98 | // IN UINTN SecondaryStackSize\r | |
99 | // );\r | |
100 | ArmPlatformStackSetSecondaryL:\r | |
101 | ASM_PFX(ArmPlatformStackSetSecondary):\r | |
102 | // Save the Link register\r | |
103 | mov x4, x30\r | |
104 | mov sp, x0\r | |
105 | \r | |
106 | // Get Core Position\r | |
107 | mov x0, x1\r | |
108 | bl ASM_PFX(ArmPlatformGetCorePosition)\r | |
109 | mov x5, x0\r | |
110 | \r | |
111 | // Get Primary Core Position\r | |
112 | bl ASM_PFX(ArmPlatformGetPrimaryCoreMpId)\r | |
113 | bl ASM_PFX(ArmPlatformGetCorePosition)\r | |
114 | \r | |
115 | // Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)\r | |
116 | cmp x5, x0\r | |
117 | b.ls 1f\r | |
118 | // Decrement the position if after the primary core\r | |
119 | sub x5, x5, #1\r | |
120 | 1:\r | |
121 | add x5, x5, #1\r | |
122 | \r | |
123 | // Compute top of the secondary stack\r | |
124 | mul x3, x3, x5\r | |
125 | \r | |
126 | // Set stack\r | |
127 | add sp, sp, x3\r | |
128 | \r | |
129 | br x4\r |