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1e57a462 1/** @file\r
2 Serial I/O Port library functions with no library constructor/destructor\r
3\r
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
9f08a052 5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
921e987b 6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
3402aac7 7\r
f4dfad05 8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
1e57a462 9\r
10**/\r
11\r
12#include <Base.h>\r
13\r
14#include <Library/IoLib.h>\r
15#include <Library/PcdLib.h>\r
112c6c22 16#include <Library/PL011UartClockLib.h>\r
12156134 17#include <Library/PL011UartLib.h>\r
1e57a462 18#include <Library/SerialPortLib.h>\r
1e57a462 19\r
2d52a3a2 20/** Initialise the serial device hardware with default settings.\r
1e57a462 21\r
2d52a3a2
A
22 @retval RETURN_SUCCESS The serial device was initialised.\r
23 @retval RETURN_INVALID_PARAMETER One or more of the default settings\r
24 has an unsupported value.\r
25 **/\r
1e57a462 26RETURN_STATUS\r
27EFIAPI\r
28SerialPortInitialize (\r
29 VOID\r
30 )\r
31{\r
15e277d5 32 UINT64 BaudRate;\r
33 UINT32 ReceiveFifoDepth;\r
34 EFI_PARITY_TYPE Parity;\r
35 UINT8 DataBits;\r
36 EFI_STOP_BITS_TYPE StopBits;\r
37\r
40b0b23e 38 BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);\r
9f08a052 39 ReceiveFifoDepth = 0; // Use default FIFO depth\r
40b0b23e
MK
40 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
41 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
42 StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits);\r
15e277d5 43\r
1e57a462 44 return PL011UartInitializePort (\r
5a9b3eb8 45 (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
40b0b23e 46 PL011UartClockGetFreq (),\r
f6300528
EL
47 &BaudRate,\r
48 &ReceiveFifoDepth,\r
49 &Parity,\r
50 &DataBits,\r
51 &StopBits\r
52 );\r
1e57a462 53}\r
54\r
55/**\r
56 Write data to serial device.\r
57\r
58 @param Buffer Point of data buffer which need to be written.\r
59 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
60\r
61 @retval 0 Write data failed.\r
62 @retval !0 Actual number of bytes written to serial device.\r
63\r
64**/\r
65UINTN\r
66EFIAPI\r
67SerialPortWrite (\r
40b0b23e
MK
68 IN UINT8 *Buffer,\r
69 IN UINTN NumberOfBytes\r
1e57a462 70 )\r
71{\r
5a9b3eb8 72 return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 73}\r
74\r
75/**\r
76 Read data from serial device and save the data in buffer.\r
77\r
78 @param Buffer Point of data buffer which need to be written.\r
79 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
80\r
81 @retval 0 Read data failed.\r
82 @retval !0 Actual number of bytes read from serial device.\r
83\r
84**/\r
85UINTN\r
86EFIAPI\r
87SerialPortRead (\r
40b0b23e
MK
88 OUT UINT8 *Buffer,\r
89 IN UINTN NumberOfBytes\r
90 )\r
1e57a462 91{\r
5a9b3eb8 92 return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 93}\r
94\r
95/**\r
96 Check to see if any data is available to be read from the debug device.\r
97\r
2d52a3a2
A
98 @retval TRUE At least one byte of data is available to be read\r
99 @retval FALSE No data is available to be read\r
1e57a462 100\r
101**/\r
102BOOLEAN\r
103EFIAPI\r
104SerialPortPoll (\r
105 VOID\r
106 )\r
107{\r
5a9b3eb8 108 return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
1e57a462 109}\r
40b0b23e 110\r
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111/**\r
112 Set new attributes to PL011.\r
113\r
9f08a052
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114 @param BaudRate The baud rate of the serial device. If the\r
115 baud rate is not supported, the speed will\r
116 be reduced down to the nearest supported one\r
117 and the variable's value will be updated\r
118 accordingly.\r
119 @param ReceiveFifoDepth The number of characters the device will\r
120 buffer on input. If the specified value is\r
121 not supported, the variable's value will\r
122 be reduced down to the nearest supported one.\r
123 @param Timeout If applicable, the number of microseconds the\r
124 device will wait before timing out a Read or\r
125 a Write operation.\r
126 @param Parity If applicable, this is the EFI_PARITY_TYPE\r
127 that is computed or checked as each character\r
128 is transmitted or received. If the device\r
129 does not support parity, the value is the\r
130 default parity value.\r
921e987b 131 @param DataBits The number of data bits in each character\r
9f08a052
EL
132 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
133 of stop bits per character. If the device\r
134 does not support stop bits, the value is the\r
135 default stop bit value.\r
921e987b 136\r
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137 @retval EFI_SUCCESS All attributes were set correctly.\r
138 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
139 value.\r
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SZ
140\r
141**/\r
142RETURN_STATUS\r
143EFIAPI\r
144SerialPortSetAttributes (\r
145 IN OUT UINT64 *BaudRate,\r
146 IN OUT UINT32 *ReceiveFifoDepth,\r
147 IN OUT UINT32 *Timeout,\r
148 IN OUT EFI_PARITY_TYPE *Parity,\r
149 IN OUT UINT8 *DataBits,\r
150 IN OUT EFI_STOP_BITS_TYPE *StopBits\r
151 )\r
152{\r
153 return PL011UartInitializePort (\r
5a9b3eb8 154 (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
40b0b23e 155 PL011UartClockGetFreq (),\r
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156 BaudRate,\r
157 ReceiveFifoDepth,\r
158 Parity,\r
159 DataBits,\r
160 StopBits\r
161 );\r
921e987b
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162}\r
163\r
164/**\r
165\r
166 Assert or deassert the control signals on a serial port.\r
167 The following control signals are set according their bit settings :\r
168 . Request to Send\r
169 . Data Terminal Ready\r
170\r
171 @param[in] Control The following bits are taken into account :\r
172 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
173 "Request To Send" control signal if this bit is\r
174 equal to one/zero.\r
175 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
176 the "Data Terminal Ready" control signal if this\r
177 bit is equal to one/zero.\r
178 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
179 the hardware loopback if this bit is equal to\r
180 one/zero.\r
181 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
182 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
183 disable the hardware flow control based on CTS (Clear\r
184 To Send) and RTS (Ready To Send) control signals.\r
185\r
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186 @retval RETURN_SUCCESS The new control bits were set on the device.\r
187 @retval RETURN_UNSUPPORTED The device does not support this operation.\r
921e987b
SZ
188\r
189**/\r
190RETURN_STATUS\r
191EFIAPI\r
192SerialPortSetControl (\r
193 IN UINT32 Control\r
194 )\r
195{\r
5a9b3eb8 196 return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b
SZ
197}\r
198\r
199/**\r
1e57a462 200\r
921e987b
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201 Retrieve the status of the control bits on a serial device.\r
202\r
203 @param[out] Control Status of the control bits on a serial device :\r
204\r
9f08a052
EL
205 . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
206 EFI_SERIAL_DATA_SET_READY,\r
207 EFI_SERIAL_RING_INDICATE,\r
208 EFI_SERIAL_CARRIER_DETECT,\r
209 EFI_SERIAL_REQUEST_TO_SEND,\r
210 EFI_SERIAL_DATA_TERMINAL_READY\r
211 are all related to the DTE (Data Terminal Equipment)\r
212 and DCE (Data Communication Equipment) modes of\r
213 operation of the serial device.\r
214 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
215 receive buffer is empty, 0 otherwise.\r
216 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
217 transmit buffer is empty, 0 otherwise.\r
218 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
219 the hardware loopback is enabled (the output feeds\r
220 the receive buffer), 0 otherwise.\r
221 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
222 if a loopback is accomplished by software, else 0.\r
223 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
224 one if the hardware flow control based on CTS (Clear\r
225 To Send) and RTS (Ready To Send) control signals is\r
226 enabled, 0 otherwise.\r
227\r
228 @retval RETURN_SUCCESS The control bits were read from the device.\r
921e987b
SZ
229\r
230**/\r
231RETURN_STATUS\r
232EFIAPI\r
233SerialPortGetControl (\r
234 OUT UINT32 *Control\r
235 )\r
236{\r
5a9b3eb8 237 return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b 238}\r