ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / MainUniCore.c

/** @file\r
*\r
*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include "PrePeiCore.h"\r
\r
VOID\r
EFIAPI\r
SecondaryMain (\r
  IN UINTN MpId\r
  )\r
{\r
  ASSERT(FALSE);\r
}\r
\r
VOID\r
EFIAPI\r
PrimaryMain (\r
  IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
  )\r
{\r
  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
  UINTN                       PpiListSize;\r
  EFI_PEI_PPI_DESCRIPTOR      *PpiList;\r
  UINTN                       TemporaryRamBase;\r
  UINTN                       TemporaryRamSize;\r
\r
  CreatePpiList (&PpiListSize, &PpiList);\r
\r
  // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at\r
  // the base of the primary core stack\r
  PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);\r
  TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;\r
  TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;\r
\r
  // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned\r
  // to ensure the stack pointer is 4-byte aligned.\r
  TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));\r
\r
  //\r
  // Bind this information into the SEC hand-off state\r
  // Note: this must be in sync with the stuff in the asm file\r
  // Note also:  HOBs (pei temp ram) MUST be above stack\r
  //\r
  SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);\r
  SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);\r
  SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
  SecCoreData.TemporaryRamBase       = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)\r
  SecCoreData.TemporaryRamSize       = TemporaryRamSize;\r
  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
  SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;\r
  SecCoreData.StackBase              = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);\r
  SecCoreData.StackSize              = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;\r
\r
  // Jump to PEI core entry point\r
  (PeiCoreEntryPoint)(&SecCoreData, PpiList);\r
}\r