ArmPlatformPkg: Code cleaning

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.h

/** @file\r
*  Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
*\r
*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
#ifndef __PREPEICORE_H_\r
#define __PREPEICORE_H_\r
\r
#include <PiPei.h>\r
#include <Ppi/TemporaryRamSupport.h>\r
\r
\r
EFI_STATUS\r
EFIAPI\r
SecTemporaryRamSupport (\r
  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
  IN UINTN                    CopySize\r
  );\r
\r
VOID\r
SecSwitchStack (\r
  INTN    StackDelta\r
  );\r
\r
// Vector Table for Pei Phase\r
VOID  PeiVectorTable (VOID);\r
\r
VOID\r
EFIAPI\r
PrimaryMain (\r
  IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
  );\r
\r
/*\r
 * This is the main function for secondary cores. They loop around until a non Null value is written to\r
 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.\r
 * Note:The secondary cores, while executing secondary_main, assumes that:\r
 *      : SGI 0 is configured as Non-secure interrupt\r
 *      : Priority Mask is configured to allow SGI 0\r
 *      : Interrupt Distributor and CPU interfaces are enabled\r
 *\r
 */\r
VOID\r
EFIAPI\r
SecondaryMain (\r
  IN UINTN CoreId\r
  );\r
\r
#endif\r