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1d5d0ae9 | 1 | // |
2 | // Copyright (c) 2011, ARM Limited. All rights reserved. | |
3 | // | |
47a8e12f | 4 | // This program and the accompanying materials |
5 | // are licensed and made available under the terms and conditions of the BSD License | |
6 | // which accompanies this distribution. The full text of the license may be found at | |
7 | // http://opensource.org/licenses/bsd-license.php | |
8 | // | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
11 | // | |
12 | // | |
1d5d0ae9 | 13 | |
14 | #include <AsmMacroIoLib.h> | |
15 | #include <Base.h> | |
16 | #include <Library/PcdLib.h> | |
17 | #include <AutoGen.h> | |
18 | ||
1d5d0ae9 | 19 | .text |
20 | .align 3 | |
21 | ||
22 | #global symbols referenced by this module | |
23 | GCC_ASM_IMPORT(CEntryPoint) | |
24 | ||
25 | StartupAddr: .word CEntryPoint | |
26 | ||
27 | #make _ModuleEntryPoint as global | |
28 | GCC_ASM_EXPORT(_ModuleEntryPoint) | |
29 | ||
30 | ||
31 | ASM_PFX(_ModuleEntryPoint): | |
32 | # Identify CPU ID | |
33 | mrc p15, 0, r0, c0, c0, 5 | |
34 | and r0, #0xf | |
35 | ||
36 | _SetupStack: | |
37 | # Setup Stack for the 4 CPU cores | |
1ad14bc8 | 38 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1) |
39 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2) | |
1d5d0ae9 | 40 | |
41 | mov r3,r0 @ r3 = core_id | |
42 | mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base | |
43 | add r3,r3,r1 @ r3 = stack_base + offset | |
44 | add r3,r3,r2,LSR #1 @ r3 = stack_offset + (stack_size/2) <-- the top half is for the heap | |
45 | mov sp, r3 | |
46 | ||
47a8e12f | 47 | # Only allocate memory in top of the primary core stack |
48 | cmp r0, #0 | |
49 | bne _PrepareArguments | |
50 | ||
51 | _AllocateGlobalPeiVariables: | |
52 | # Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer) | |
53 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1) | |
54 | sub sp, sp, r1 | |
55 | ||
56 | _PrepareArguments: | |
57 | # The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector | |
1ad14bc8 | 58 | LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2) |
1d5d0ae9 | 59 | add r2, r2, #4 |
60 | ldr r1, [r2] | |
61 | ||
62 | # move sec startup address into a data register | |
63 | # ensure we're jumping to FV version of the code (not boot remapped alias) | |
64 | ldr r2, StartupAddr | |
65 | ||
262a9b04 | 66 | # jump to PrePeiCore C code |
1d5d0ae9 | 67 | # r0 = core_id |
68 | # r1 = pei_core_address | |
69 | blx r2 |