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1bc83266 | 1 | /** @file\r |
5a5440d0 PG |
2 | \r |
3 | Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r | |
4 | \r | |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | \r | |
1bc83266 HL |
7 | **/\r |
8 | \r | |
9 | #include "PrePi.h"\r | |
10 | \r | |
11 | #include <Chipset/AArch64.h>\r | |
12 | \r | |
13 | VOID\r | |
14 | ArchInitialize (\r | |
15 | VOID\r | |
16 | )\r | |
17 | {\r | |
18 | // Enable Floating Point\r | |
19 | if (FixedPcdGet32 (PcdVFPEnabled)) {\r | |
20 | ArmEnableVFP ();\r | |
21 | }\r | |
22 | \r | |
23 | if (ArmReadCurrentEL () == AARCH64_EL2) {\r | |
24 | // Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2\r | |
25 | ArmWriteHcr (ARM_HCR_TGE);\r | |
0e077330 SM |
26 | \r |
27 | /* Enable Timer access for non-secure EL1 and EL0\r | |
28 | The cnthctl_el2 register bits are architecturally\r | |
29 | UNKNOWN on reset.\r | |
30 | Disable event stream as it is not in use at this stage\r | |
31 | */\r | |
32 | ArmWriteCntHctl (CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN);\r | |
1bc83266 HL |
33 | }\r |
34 | }\r |