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ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
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cd872e40 1//\r
5dbacdb2 2// Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
cd872e40 3//\r
4// This program and the accompanying materials\r
5// are licensed and made available under the terms and conditions of the BSD License\r
6// which accompanies this distribution. The full text of the license may be found at\r
7// http://opensource.org/licenses/bsd-license.php\r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
cd872e40 15\r
063ad84e 16#include <Chipset/ArmV7.h>\r
17\r
5dbacdb2 18GCC_ASM_EXPORT(mSystemMemoryEnd)\r
cd872e40 19\r
d2fa09a1 20ASM_FUNC(_ModuleEntryPoint)\r
b5a57223 21 // Do early platform specific actions\r
22 bl ASM_PFX(ArmPlatformPeiBootAction)\r
23\r
0787bc61 24 // Get ID of this CPU in Multicore system\r
25 bl ASM_PFX(ArmReadMpidr)\r
bebda7ce 26 // Keep a copy of the MpId register value\r
c2d87a49 27 mov r8, r0\r
cd872e40 28\r
d269095b 29_SetSVCMode:\r
99565b88 30 // Enter SVC mode, Disable FIQ and IRQ\r
063ad84e 31 mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)\r
d269095b 32 msr CPSR_c, r1\r
33\r
2dbcb8f0 34// Check if we can install the stack at the top of the System Memory or if we need\r
d269095b 35// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
36// at the top of the DRAM)\r
5dbacdb2
OM
37_SystemMemoryEndInit:\r
38 ldr r1, mSystemMemoryEnd\r
39\r
40 // Is mSystemMemoryEnd initialized?\r
41 cmp r1, #0\r
42 bne _SetupStackPosition\r
43\r
d2fa09a1
AB
44 MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize) - 1)\r
45\r
5dbacdb2
OM
46 // Update the global variable\r
47 adr r2, mSystemMemoryEnd\r
48 str r1, [r2]\r
49\r
50_SetupStackPosition:\r
51 // r1 = SystemMemoryTop\r
cd872e40 52\r
d269095b 53 // Calculate Top of the Firmware Device\r
d2fa09a1
AB
54 MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))\r
55 MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)\r
7defe7b3 56 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
d269095b 57\r
58 // UEFI Memory Size (stacks are allocated in this region)\r
d2fa09a1 59 MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))\r
d269095b 60\r
61 //\r
62 // Reserve the memory for the UEFI region (contain stacks on its top)\r
63 //\r
64\r
65 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
91c38d4e
RC
66 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
67 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
68 cmp r0, r4\r
69 bge _SetupStack\r
d269095b 70\r
71 // Case the top of stacks is the FdBaseAddress\r
91c38d4e 72 mov r1, r2\r
cd872e40 73\r
74_SetupStack:\r
2dbcb8f0 75 // r1 contains the top of the stack (and the UEFI Memory)\r
d269095b 76\r
2569b068 77 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
78 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
79 // top of the memory space)\r
c2d87a49 80 adds r9, r1, #1\r
2569b068 81 bcs _SetupOverflowStack\r
82\r
83_SetupAlignedStack:\r
c2d87a49 84 mov r1, r9\r
2569b068 85 b _GetBaseUefiMemory\r
86\r
87_SetupOverflowStack:\r
88 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
89 // aligned (4KB)\r
d2fa09a1
AB
90 MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)\r
91 and r1, r1, r9\r
2569b068 92\r
93_GetBaseUefiMemory:\r
d269095b 94 // Calculate the Base of the UEFI Memory\r
c2d87a49 95 sub r9, r1, r4\r
cd872e40 96\r
2dbcb8f0 97_GetStackBase:\r
1377db63 98 // r1 = The top of the Mpcore Stacks\r
2dbcb8f0 99 // Stack for the primary core = PrimaryCoreStack\r
d2fa09a1 100 MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
c2d87a49 101 sub r10, r1, r2\r
17839a45 102\r
103 // Stack for the secondary core = Number of Cores - 1\r
d2fa09a1 104 MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
c2d87a49 105 sub r10, r10, r1\r
17839a45 106\r
c2d87a49 107 // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
91c38d4e
RC
108 mov r0, r10\r
109 mov r1, r8\r
17839a45 110 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
d2fa09a1
AB
111 MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
112 MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
91c38d4e 113 bl ASM_PFX(ArmPlatformStackSet)\r
2dbcb8f0 114\r
115 // Is it the Primary Core ?\r
c2d87a49 116 mov r0, r8\r
bebda7ce 117 bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
118 cmp r0, #1\r
cd872e40 119 bne _PrepareArguments\r
120\r
cd872e40 121_PrepareArguments:\r
c2d87a49
OM
122 mov r0, r8\r
123 mov r1, r9\r
124 mov r2, r10\r
c524ffbb 125 mov r3, sp\r
126\r
cd872e40 127 // Move sec startup address into a data register\r
128 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
d2fa09a1 129 ldr r4, =ASM_PFX(CEntryPoint)\r
cd872e40 130\r
d269095b 131 // Jump to PrePiCore C code\r
0787bc61 132 // r0 = MpId\r
cd872e40 133 // r1 = UefiMemoryBase\r
c524ffbb 134 // r2 = StacksBase\r
c524ffbb 135 blx r4\r
cd872e40 136\r
2dbcb8f0 137_NeverReturn:\r
138 b _NeverReturn\r
139\r
d2fa09a1 140ASM_PFX(mSystemMemoryEnd): .8byte 0\r