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cd872e40 | 1 | //\r |
063ad84e | 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
cd872e40 | 3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
063ad84e | 19 | #include <Chipset/ArmV7.h>\r |
20 | \r | |
cd872e40 | 21 | .text\r |
22 | .align 3\r | |
23 | \r | |
cd872e40 | 24 | GCC_ASM_IMPORT(CEntryPoint)\r |
0787bc61 | 25 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
17839a45 | 26 | GCC_ASM_IMPORT(ArmPlatformStackSet)\r |
d269095b | 27 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
cd872e40 | 28 | \r |
29 | StartupAddr: .word CEntryPoint\r | |
30 | \r | |
cd872e40 | 31 | \r |
32 | ASM_PFX(_ModuleEntryPoint):\r | |
0787bc61 | 33 | // Get ID of this CPU in Multicore system\r |
34 | bl ASM_PFX(ArmReadMpidr)\r | |
35 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
17839a45 | 36 | and r6, r0, r1\r |
cd872e40 | 37 | \r |
d269095b | 38 | _SetSVCMode:\r |
99565b88 | 39 | // Enter SVC mode, Disable FIQ and IRQ\r |
063ad84e | 40 | mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)\r |
d269095b | 41 | msr CPSR_c, r1\r |
42 | \r | |
2dbcb8f0 | 43 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 44 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
45 | // at the top of the DRAM)\r | |
46 | _SetupStackPosition:\r | |
cd872e40 | 47 | // Compute Top of System Memory\r |
48 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r | |
49 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r | |
2569b068 | 50 | sub r2, r2, #1\r |
cd872e40 | 51 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
cd872e40 | 52 | \r |
d269095b | 53 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 54 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
55 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
2569b068 | 56 | sub r3, r3, #1\r |
7defe7b3 | 57 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
d269095b | 58 | \r |
59 | // UEFI Memory Size (stacks are allocated in this region)\r | |
60 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
61 | \r | |
62 | //\r | |
63 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
64 | //\r | |
65 | \r | |
66 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 67 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
68 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
69 | cmp r0, r4\r | |
d269095b | 70 | bge _SetupStack\r |
71 | \r | |
72 | // Case the top of stacks is the FdBaseAddress\r | |
73 | mov r1, r2\r | |
cd872e40 | 74 | \r |
75 | _SetupStack:\r | |
2dbcb8f0 | 76 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 77 | \r |
2569b068 | 78 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
79 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
80 | // top of the memory space)\r | |
17839a45 | 81 | adds r7, r1, #1\r |
2569b068 | 82 | bcs _SetupOverflowStack\r |
83 | \r | |
84 | _SetupAlignedStack:\r | |
17839a45 | 85 | mov r1, r7\r |
2569b068 | 86 | b _GetBaseUefiMemory\r |
87 | \r | |
88 | _SetupOverflowStack:\r | |
89 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
90 | // aligned (4KB)\r | |
17839a45 | 91 | LoadConstantToReg (EFI_PAGE_MASK, r7)\r |
92 | and r7, r7, r1\r | |
93 | sub r1, r1, r7\r | |
2569b068 | 94 | \r |
95 | _GetBaseUefiMemory:\r | |
d269095b | 96 | // Calculate the Base of the UEFI Memory\r |
17839a45 | 97 | sub r7, r1, r4\r |
cd872e40 | 98 | \r |
2dbcb8f0 | 99 | _GetStackBase:\r |
1377db63 | 100 | // r1 = The top of the Mpcore Stacks\r |
2dbcb8f0 | 101 | // Stack for the primary core = PrimaryCoreStack\r |
102 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
17839a45 | 103 | sub r8, r1, r2\r |
104 | \r | |
105 | // Stack for the secondary core = Number of Cores - 1\r | |
106 | LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r | |
107 | sub r0, r0, #1\r | |
108 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r | |
109 | mul r1, r1, r0\r | |
110 | sub r8, r8, r1\r | |
111 | \r | |
112 | // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r | |
113 | mov r0, r8\r | |
114 | mov r1, r6\r | |
115 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r | |
1377db63 | 116 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
17839a45 | 117 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r |
118 | bl ASM_PFX(ArmPlatformStackSet)\r | |
2dbcb8f0 | 119 | \r |
120 | // Is it the Primary Core ?\r | |
121 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r | |
17839a45 | 122 | cmp r6, r4\r |
cd872e40 | 123 | bne _PrepareArguments\r |
124 | \r | |
17839a45 | 125 | _ReserveGlobalVariable:\r |
126 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r | |
127 | // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r | |
128 | InitializePrimaryStack(r0, r1)\r | |
2dbcb8f0 | 129 | \r |
cd872e40 | 130 | _PrepareArguments:\r |
17839a45 | 131 | mov r0, r6\r |
132 | mov r1, r7\r | |
133 | mov r2, r8\r | |
c524ffbb | 134 | mov r3, sp\r |
135 | \r | |
cd872e40 | 136 | // Move sec startup address into a data register\r |
137 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 138 | ldr r4, StartupAddr\r |
cd872e40 | 139 | \r |
d269095b | 140 | // Jump to PrePiCore C code\r |
0787bc61 | 141 | // r0 = MpId\r |
cd872e40 | 142 | // r1 = UefiMemoryBase\r |
c524ffbb | 143 | // r2 = StacksBase\r |
144 | // r3 = GlobalVariableBase\r | |
145 | blx r4\r | |
cd872e40 | 146 | \r |
2dbcb8f0 | 147 | _NeverReturn:\r |
148 | b _NeverReturn\r | |
149 | \r |