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cd872e40 1/** @file\r
2*\r
81514a8a 3* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
cd872e40 4*\r
5* This program and the accompanying materials\r
6* are licensed and made available under the terms and conditions of the BSD License\r
7* which accompanies this distribution. The full text of the license may be found at\r
8* http://opensource.org/licenses/bsd-license.php\r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12*\r
13**/\r
14\r
15#include <PiPei.h>\r
16\r
17#include <Library/DebugAgentLib.h>\r
18#include <Library/PrePiLib.h>\r
cd872e40 19#include <Library/PrintLib.h>\r
20#include <Library/PeCoffGetEntryPointLib.h>\r
37573927 21#include <Library/PrePiHobListPointerLib.h>\r
cd872e40 22#include <Library/TimerLib.h>\r
23#include <Library/PerformanceLib.h>\r
24\r
25#include <Ppi/GuidedSectionExtraction.h>\r
0dbbacdf 26#include <Ppi/ArmMpCoreInfo.h>\r
cd872e40 27#include <Guid/LzmaDecompress.h>\r
8fc38a3f 28#include <Guid/ArmGlobalVariableHob.h>\r
cd872e40 29\r
30#include "PrePi.h"\r
31#include "LzmaDecompress.h"\r
32\r
c357fd6a
OM
33#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \\r
34 ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))\r
8fc38a3f 35\r
36// Not used when PrePi in run in XIP mode\r
37UINTN mGlobalVariableBase = 0;\r
38\r
cd872e40 39EFI_STATUS\r
40EFIAPI\r
41ExtractGuidedSectionLibConstructor (\r
42 VOID\r
43 );\r
44\r
45EFI_STATUS\r
46EFIAPI\r
47LzmaDecompressLibConstructor (\r
48 VOID\r
49 );\r
50\r
8fc38a3f 51VOID\r
52EFIAPI\r
53BuildGlobalVariableHob (\r
54 IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,\r
55 IN UINT32 GlobalVariableSize\r
56 )\r
57{\r
58 ARM_HOB_GLOBAL_VARIABLE *Hob;\r
59\r
60 Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof (ARM_HOB_GLOBAL_VARIABLE));\r
61 ASSERT(Hob != NULL);\r
62\r
63 CopyGuid (&(Hob->Header.Name), &gArmGlobalVariableGuid);\r
64 Hob->GlobalVariableBase = GlobalVariableBase;\r
65 Hob->GlobalVariableSize = GlobalVariableSize;\r
66}\r
67\r
0dbbacdf 68EFI_STATUS\r
69GetPlatformPpi (\r
70 IN EFI_GUID *PpiGuid,\r
71 OUT VOID **Ppi\r
72 )\r
73{\r
74 UINTN PpiListSize;\r
75 UINTN PpiListCount;\r
76 EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
77 UINTN Index;\r
78\r
79 PpiListSize = 0;\r
80 ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
81 PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
82 for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
83 if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
84 *Ppi = PpiList->Ppi;\r
85 return EFI_SUCCESS;\r
86 }\r
87 }\r
88\r
89 return EFI_NOT_FOUND;\r
90}\r
91\r
cd872e40 92VOID\r
93PrePiMain (\r
94 IN UINTN UefiMemoryBase,\r
c524ffbb 95 IN UINTN StacksBase,\r
96 IN UINTN GlobalVariableBase,\r
cd872e40 97 IN UINT64 StartTimeStamp\r
98 )\r
99{\r
37573927 100 EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
0dbbacdf 101 ARM_MP_CORE_INFO_PPI* ArmMpCoreInfoPpi;\r
102 UINTN ArmCoreCount;\r
103 ARM_CORE_INFO* ArmCoreInfoTable;\r
cd872e40 104 EFI_STATUS Status;\r
105 CHAR8 Buffer[100];\r
106 UINTN CharCount;\r
d269095b 107 UINTN StacksSize;\r
cd872e40 108\r
8fc38a3f 109 // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
110 ASSERT (IS_XIP() || \r
c357fd6a
OM
111 ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
112 ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet64 (PcdSystemMemorySize)))));\r
8fc38a3f 113\r
1bc83266
HL
114 // Initialize the architecture specific bits\r
115 ArchInitialize ();\r
cd872e40 116\r
117 // Initialize the Serial Port\r
118 SerialPortInitialize ();\r
37363dff 119 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
120 (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
cd872e40 121 SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
122\r
123 // Initialize the Debug Agent for Source Level Debugging\r
124 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
125 SaveAndSetDebugTimerInterrupt (TRUE);\r
2ee85366 126 \r
d269095b 127 // Declare the PI/UEFI memory region\r
37573927 128 HobList = HobConstructor (\r
cd872e40 129 (VOID*)UefiMemoryBase,\r
130 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
131 (VOID*)UefiMemoryBase,\r
d269095b 132 (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
133 );\r
37573927 134 PrePeiSetHobList (HobList);\r
cd872e40 135\r
136 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
137 Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
138 ASSERT_EFI_ERROR (Status);\r
139\r
d269095b 140 // Create the Stacks HOB (reserve the memory for all stacks)\r
99565b88 141 if (ArmIsMpCore ()) {\r
81514a8a
OM
142 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) +\r
143 ((FixedPcdGet32 (PcdCoreCount) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize));\r
99565b88 144 } else {\r
145 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
146 }\r
d269095b 147 BuildStackHob (StacksBase, StacksSize);\r
cd872e40 148\r
8fc38a3f 149 // Declare the Global Variable HOB\r
150 BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 (PcdPeiGlobalVariableSize));\r
151\r
44788bae 152 //TODO: Call CpuPei as a library\r
153 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
154\r
0dbbacdf 155 if (ArmIsMpCore ()) {\r
156 // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid\r
157 Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
158\r
159 // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
160 ASSERT_EFI_ERROR (Status);\r
161\r
162 // Build the MP Core Info Table\r
163 ArmCoreCount = 0;\r
164 Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
165 if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {\r
166 // Build MPCore Info HOB\r
167 BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);\r
168 }\r
169 }\r
170\r
cd872e40 171 // Set the Boot Mode\r
172 SetBootMode (ArmPlatformGetBootMode ());\r
173\r
174 // Initialize Platform HOBs (CpuHob and FvHob)\r
175 Status = PlatformPeim ();\r
176 ASSERT_EFI_ERROR (Status);\r
177\r
cd872e40 178 // Now, the HOB List has been initialized, we can register performance information\r
179 PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
180\r
181 // SEC phase needs to run library constructors by hand.\r
182 ExtractGuidedSectionLibConstructor ();\r
183 LzmaDecompressLibConstructor ();\r
184\r
185 // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
186 BuildPeCoffLoaderHob ();\r
187 BuildExtractSectionHob (\r
188 &gLzmaCustomDecompressGuid,\r
189 LzmaGuidedSectionGetInfo,\r
190 LzmaGuidedSectionExtraction\r
191 );\r
192\r
193 // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
194 Status = DecompressFirstFv ();\r
195 ASSERT_EFI_ERROR (Status);\r
196\r
197 // Load the DXE Core and transfer control to it\r
198 Status = LoadDxeCoreFromFv (NULL, 0);\r
199 ASSERT_EFI_ERROR (Status);\r
200}\r
201\r
202VOID\r
203CEntryPoint (\r
0787bc61 204 IN UINTN MpId,\r
c524ffbb 205 IN UINTN UefiMemoryBase,\r
206 IN UINTN StacksBase,\r
207 IN UINTN GlobalVariableBase\r
cd872e40 208 )\r
209{\r
210 UINT64 StartTimeStamp;\r
2ee85366 211 \r
695df8ba 212 ASSERT(!ArmIsMpCore() || (PcdGet32 (PcdCoreCount) > 1));\r
213\r
f437141a 214 // Initialize the platform specific controllers\r
215 ArmPlatformInitialize (MpId);\r
216\r
bebda7ce 217 if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {\r
cd872e40 218 // Initialize the Timer Library to setup the Timer HW controller\r
219 TimerConstructor ();\r
220 // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
221 StartTimeStamp = GetPerformanceCounter ();\r
2ee85366 222 } else {\r
223 StartTimeStamp = 0;\r
cd872e40 224 }\r
225\r
6dafb303
OM
226 // Data Cache enabled on Primary core when MMU is enabled.\r
227 ArmDisableDataCache ();\r
228 // Invalidate Data cache\r
229 ArmInvalidateDataCache ();\r
d269095b 230 // Invalidate instruction cache\r
231 ArmInvalidateInstructionCache ();\r
6dafb303 232 // Enable Instruction Caches on all cores.\r
d269095b 233 ArmEnableInstructionCache ();\r
cd872e40 234\r
99565b88 235 // Define the Global Variable region when we are not running in XIP\r
236 if (!IS_XIP()) {\r
bebda7ce 237 if (ArmPlatformIsPrimaryCore (MpId)) {\r
99565b88 238 mGlobalVariableBase = GlobalVariableBase;\r
1aa9860e 239 if (ArmIsMpCore()) {\r
b1d41be7 240 // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)\r
241 ArmCallSEV ();\r
1aa9860e 242 }\r
99565b88 243 } else {\r
b1d41be7 244 // Wait the Primay core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)\r
245 ArmCallWFE ();\r
99565b88 246 }\r
247 }\r
248 \r
d269095b 249 // If not primary Jump to Secondary Main\r
bebda7ce 250 if (ArmPlatformIsPrimaryCore (MpId)) {\r
cd872e40 251 // Goto primary Main.\r
c524ffbb 252 PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);\r
cd872e40 253 } else {\r
0787bc61 254 SecondaryMain (MpId);\r
cd872e40 255 }\r
256\r
257 // DXE Core should always load and never return\r
258 ASSERT (FALSE);\r
259}\r
260\r