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cd872e40 1/** @file\r
2*\r
f437141a 3* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
cd872e40 4*\r
5* This program and the accompanying materials\r
6* are licensed and made available under the terms and conditions of the BSD License\r
7* which accompanies this distribution. The full text of the license may be found at\r
8* http://opensource.org/licenses/bsd-license.php\r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12*\r
13**/\r
14\r
15#include <PiPei.h>\r
16\r
17#include <Library/DebugAgentLib.h>\r
18#include <Library/PrePiLib.h>\r
cd872e40 19#include <Library/PrintLib.h>\r
20#include <Library/PeCoffGetEntryPointLib.h>\r
37573927 21#include <Library/PrePiHobListPointerLib.h>\r
cd872e40 22#include <Library/TimerLib.h>\r
23#include <Library/PerformanceLib.h>\r
24\r
25#include <Ppi/GuidedSectionExtraction.h>\r
0dbbacdf 26#include <Ppi/ArmMpCoreInfo.h>\r
cd872e40 27#include <Guid/LzmaDecompress.h>\r
8fc38a3f 28#include <Guid/ArmGlobalVariableHob.h>\r
cd872e40 29\r
30#include "PrePi.h"\r
31#include "LzmaDecompress.h"\r
32\r
99565b88 33#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \\r
8fc38a3f 34 ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet32 (PcdSystemMemoryBase)))\r
35\r
36// Not used when PrePi in run in XIP mode\r
37UINTN mGlobalVariableBase = 0;\r
38\r
cd872e40 39EFI_STATUS\r
40EFIAPI\r
41ExtractGuidedSectionLibConstructor (\r
42 VOID\r
43 );\r
44\r
45EFI_STATUS\r
46EFIAPI\r
47LzmaDecompressLibConstructor (\r
48 VOID\r
49 );\r
50\r
8fc38a3f 51VOID\r
52EFIAPI\r
53BuildGlobalVariableHob (\r
54 IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,\r
55 IN UINT32 GlobalVariableSize\r
56 )\r
57{\r
58 ARM_HOB_GLOBAL_VARIABLE *Hob;\r
59\r
60 Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof (ARM_HOB_GLOBAL_VARIABLE));\r
61 ASSERT(Hob != NULL);\r
62\r
63 CopyGuid (&(Hob->Header.Name), &gArmGlobalVariableGuid);\r
64 Hob->GlobalVariableBase = GlobalVariableBase;\r
65 Hob->GlobalVariableSize = GlobalVariableSize;\r
66}\r
67\r
0dbbacdf 68EFI_STATUS\r
69GetPlatformPpi (\r
70 IN EFI_GUID *PpiGuid,\r
71 OUT VOID **Ppi\r
72 )\r
73{\r
74 UINTN PpiListSize;\r
75 UINTN PpiListCount;\r
76 EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
77 UINTN Index;\r
78\r
79 PpiListSize = 0;\r
80 ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
81 PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
82 for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
83 if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
84 *Ppi = PpiList->Ppi;\r
85 return EFI_SUCCESS;\r
86 }\r
87 }\r
88\r
89 return EFI_NOT_FOUND;\r
90}\r
91\r
cd872e40 92VOID\r
93PrePiMain (\r
94 IN UINTN UefiMemoryBase,\r
c524ffbb 95 IN UINTN StacksBase,\r
96 IN UINTN GlobalVariableBase,\r
cd872e40 97 IN UINT64 StartTimeStamp\r
98 )\r
99{\r
37573927 100 EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
0dbbacdf 101 ARM_MP_CORE_INFO_PPI* ArmMpCoreInfoPpi;\r
102 UINTN ArmCoreCount;\r
103 ARM_CORE_INFO* ArmCoreInfoTable;\r
cd872e40 104 EFI_STATUS Status;\r
105 CHAR8 Buffer[100];\r
106 UINTN CharCount;\r
d269095b 107 UINTN StacksSize;\r
cd872e40 108\r
8fc38a3f 109 // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
110 ASSERT (IS_XIP() || \r
111 ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet32 (PcdSystemMemoryBase)) &&\r
99565b88 112 ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));\r
8fc38a3f 113\r
cd872e40 114 // Enable program flow prediction, if supported.\r
115 ArmEnableBranchPrediction ();\r
116\r
117 if (FixedPcdGet32(PcdVFPEnabled)) {\r
118 ArmEnableVFP();\r
119 }\r
120\r
121 // Initialize the Serial Port\r
122 SerialPortInitialize ();\r
37363dff 123 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
124 (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
cd872e40 125 SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
126\r
127 // Initialize the Debug Agent for Source Level Debugging\r
128 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
129 SaveAndSetDebugTimerInterrupt (TRUE);\r
2ee85366 130 \r
d269095b 131 // Declare the PI/UEFI memory region\r
37573927 132 HobList = HobConstructor (\r
cd872e40 133 (VOID*)UefiMemoryBase,\r
134 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
135 (VOID*)UefiMemoryBase,\r
d269095b 136 (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
137 );\r
37573927 138 PrePeiSetHobList (HobList);\r
cd872e40 139\r
140 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
141 Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
142 ASSERT_EFI_ERROR (Status);\r
143\r
d269095b 144 // Create the Stacks HOB (reserve the memory for all stacks)\r
99565b88 145 if (ArmIsMpCore ()) {\r
146 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));\r
147 } else {\r
148 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
149 }\r
d269095b 150 BuildStackHob (StacksBase, StacksSize);\r
cd872e40 151\r
8fc38a3f 152 // Declare the Global Variable HOB\r
153 BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 (PcdPeiGlobalVariableSize));\r
154\r
44788bae 155 //TODO: Call CpuPei as a library\r
156 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
157\r
0dbbacdf 158 if (ArmIsMpCore ()) {\r
159 // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid\r
160 Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
161\r
162 // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
163 ASSERT_EFI_ERROR (Status);\r
164\r
165 // Build the MP Core Info Table\r
166 ArmCoreCount = 0;\r
167 Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
168 if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {\r
169 // Build MPCore Info HOB\r
170 BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);\r
171 }\r
172 }\r
173\r
cd872e40 174 // Set the Boot Mode\r
175 SetBootMode (ArmPlatformGetBootMode ());\r
176\r
177 // Initialize Platform HOBs (CpuHob and FvHob)\r
178 Status = PlatformPeim ();\r
179 ASSERT_EFI_ERROR (Status);\r
180\r
cd872e40 181 // Now, the HOB List has been initialized, we can register performance information\r
182 PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
183\r
184 // SEC phase needs to run library constructors by hand.\r
185 ExtractGuidedSectionLibConstructor ();\r
186 LzmaDecompressLibConstructor ();\r
187\r
188 // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
189 BuildPeCoffLoaderHob ();\r
190 BuildExtractSectionHob (\r
191 &gLzmaCustomDecompressGuid,\r
192 LzmaGuidedSectionGetInfo,\r
193 LzmaGuidedSectionExtraction\r
194 );\r
195\r
196 // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
197 Status = DecompressFirstFv ();\r
198 ASSERT_EFI_ERROR (Status);\r
199\r
200 // Load the DXE Core and transfer control to it\r
201 Status = LoadDxeCoreFromFv (NULL, 0);\r
202 ASSERT_EFI_ERROR (Status);\r
203}\r
204\r
205VOID\r
206CEntryPoint (\r
0787bc61 207 IN UINTN MpId,\r
c524ffbb 208 IN UINTN UefiMemoryBase,\r
209 IN UINTN StacksBase,\r
210 IN UINTN GlobalVariableBase\r
cd872e40 211 )\r
212{\r
213 UINT64 StartTimeStamp;\r
2ee85366 214 \r
695df8ba 215 ASSERT(!ArmIsMpCore() || (PcdGet32 (PcdCoreCount) > 1));\r
216\r
f437141a 217 // Initialize the platform specific controllers\r
218 ArmPlatformInitialize (MpId);\r
219\r
0787bc61 220 if (IS_PRIMARY_CORE(MpId) && PerformanceMeasurementEnabled ()) {\r
cd872e40 221 // Initialize the Timer Library to setup the Timer HW controller\r
222 TimerConstructor ();\r
223 // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
224 StartTimeStamp = GetPerformanceCounter ();\r
2ee85366 225 } else {\r
226 StartTimeStamp = 0;\r
cd872e40 227 }\r
228\r
d269095b 229 // Clean Data cache\r
230 ArmCleanInvalidateDataCache ();\r
cd872e40 231\r
d269095b 232 // Invalidate instruction cache\r
233 ArmInvalidateInstructionCache ();\r
cd872e40 234\r
235 //TODO:Drain Write Buffer\r
236\r
237 // Enable Instruction & Data caches\r
d269095b 238 ArmEnableDataCache ();\r
239 ArmEnableInstructionCache ();\r
cd872e40 240\r
99565b88 241 // Define the Global Variable region when we are not running in XIP\r
242 if (!IS_XIP()) {\r
243 if (IS_PRIMARY_CORE(MpId)) {\r
244 mGlobalVariableBase = GlobalVariableBase;\r
1aa9860e 245 if (ArmIsMpCore()) {\r
b1d41be7 246 // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)\r
247 ArmCallSEV ();\r
1aa9860e 248 }\r
99565b88 249 } else {\r
b1d41be7 250 // Wait the Primay core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)\r
251 ArmCallWFE ();\r
99565b88 252 }\r
253 }\r
254 \r
d269095b 255 // If not primary Jump to Secondary Main\r
0787bc61 256 if (IS_PRIMARY_CORE(MpId)) {\r
cd872e40 257 // Goto primary Main.\r
c524ffbb 258 PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);\r
cd872e40 259 } else {\r
0787bc61 260 SecondaryMain (MpId);\r
cd872e40 261 }\r
262\r
263 // DXE Core should always load and never return\r
264 ASSERT (FALSE);\r
265}\r
266\r