[mirror_edk2.git] / ArmPlatformPkg / Sec / Helper.S

#========================================================================================\r
#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
#  \r
#  This program and the accompanying materials                          \r
#  are licensed and made available under the terms and conditions of the BSD License         \r
#  which accompanies this distribution.  The full text of the license may be found at        \r
#  http:#opensource.org/licenses/bsd-license.php                                            \r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
#\r
#=======================================================================================\r
\r
#start of the code section\r
.text \r
.align 3\r
\r
GCC_ASM_EXPORT(return_from_exception)\r
GCC_ASM_EXPORT(enter_monitor_mode)\r
GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r
GCC_ASM_EXPORT(set_non_secure_mode)\r
\r
# arg0: Secure Monitor mode stack\r
ASM_PFX(enter_monitor_mode):\r
    mov     r2, lr                      @ Save current lr\r
\r
    mrs     r1, cpsr                    @ Save current mode (SVC) in r1\r
    bic     r3, r1, #0x1f               @ Clear all mode bits\r
    orr     r3, r3, #0x16               @ Set bits for Monitor mode\r
    msr     cpsr_cxsf, r3               @ We are now in Monitor Mode\r
\r
    mov     sp, r0                      @ Use the passed sp\r
    mov     lr, r2                      @ Use the same lr as before\r
    \r
    msr     spsr_cxsf, r1               @ Use saved mode for the MOVS jump to the kernel\r
    bx      lr\r
\r
# We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r
# When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r
# 'pc'; we will not change the CPSR flag and it will crash.\r
# The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r
ASM_PFX(return_from_exception):\r
    ldr     lr, returned_exception\r
\r
    #The following instruction breaks the code.\r
    #movs    pc, lr\r
    mrs     r2, cpsr\r
    bic     r2, r2, #0x1f\r
    orr     r2, r2, #0x13\r
    msr     cpsr_c, r2\r
\r
returned_exception:                           @ We are now in non-secure state\r
    bx      r0\r
\r
# Save the current Program Status Register (PSR) into the Saved PSR\r
ASM_PFX(copy_cpsr_into_spsr):\r
    mrs     r0, cpsr\r
    msr     spsr_cxsf, r0\r
    bx      lr\r
\r
# Set the Non Secure Mode\r
ASM_PFX(set_non_secure_mode):\r
    push    { r1 }\r
    and	    r0, r0, #0x1f     @ Keep only the mode bits\r
    mrs     r1, spsr          @ Read the spsr\r
    bic     r1, r1, #0x1f     @ Clear all mode bits\r
    orr	    r1, r1, r0\r
    msr     spsr_cxsf, r1     @ write back spsr (may have caused a mode switch)\r
    isb\r
    pop     { r1 }\r
    bx      lr                @ return (hopefully thumb-safe!)\r
\r
dead:\r
    b       dead\r
    \r
ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r
Commit	Line	Data
1d5d0ae9	1	#========================================================================================\r
8cc852f7	2	# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
1d5d0ae9	3	# \r
	4	# This program and the accompanying materials \r
	5	# are licensed and made available under the terms and conditions of the BSD License \r
	6	# which accompanies this distribution. The full text of the license may be found at \r
	7	# http:#opensource.org/licenses/bsd-license.php \r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	#\r
	12	#=======================================================================================\r
	13	\r
	14	#start of the code section\r
	15	.text \r
	16	.align 3\r
	17	\r
1d5d0ae9	18	GCC_ASM_EXPORT(return_from_exception)\r
	19	GCC_ASM_EXPORT(enter_monitor_mode)\r
	20	GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r
513aa349	21	GCC_ASM_EXPORT(set_non_secure_mode)\r
1d5d0ae9	22	\r
1d5d0ae9	23	# arg0: Secure Monitor mode stack\r
	24	ASM_PFX(enter_monitor_mode):\r
	25	mov r2, lr @ Save current lr\r
	26	\r
	27	mrs r1, cpsr @ Save current mode (SVC) in r1\r
	28	bic r3, r1, #0x1f @ Clear all mode bits\r
	29	orr r3, r3, #0x16 @ Set bits for Monitor mode\r
	30	msr cpsr_cxsf, r3 @ We are now in Monitor Mode\r
	31	\r
	32	mov sp, r0 @ Use the passed sp\r
	33	mov lr, r2 @ Use the same lr as before\r
	34	\r
	35	msr spsr_cxsf, r1 @ Use saved mode for the MOVS jump to the kernel\r
	36	bx lr\r
	37	\r
	38	# We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r
	39	# When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r
	40	# 'pc'; we will not change the CPSR flag and it will crash.\r
	41	# The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r
	42	ASM_PFX(return_from_exception):\r
	43	ldr lr, returned_exception\r
	44	\r
	45	#The following instruction breaks the code.\r
	46	#movs pc, lr\r
	47	mrs r2, cpsr\r
	48	bic r2, r2, #0x1f\r
	49	orr r2, r2, #0x13\r
	50	msr cpsr_c, r2\r
	51	\r
	52	returned_exception: @ We are now in non-secure state\r
	53	bx r0\r
	54	\r
	55	# Save the current Program Status Register (PSR) into the Saved PSR\r
	56	ASM_PFX(copy_cpsr_into_spsr):\r
	57	mrs r0, cpsr\r
	58	msr spsr_cxsf, r0\r
	59	bx lr\r
	60	\r
513aa349	61	# Set the Non Secure Mode\r
	62	ASM_PFX(set_non_secure_mode):\r
	63	push { r1 }\r
	64	and r0, r0, #0x1f @ Keep only the mode bits\r
	65	mrs r1, spsr @ Read the spsr\r
	66	bic r1, r1, #0x1f @ Clear all mode bits\r
	67	orr r1, r1, r0\r
	68	msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)\r
	69	isb\r
	70	pop { r1 }\r
	71	bx lr @ return (hopefully thumb-safe!)\r
	72	\r
1d5d0ae9	73	dead:\r
6377d2f1	74	b dead\r
1d5d0ae9	75	\r
6377d2f1	76	ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r