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1 | #========================================================================================\r |
| 2 | # Copyright (c) 2011, ARM Limited. All rights reserved.\r |
| 3 | # \r |
| 4 | # This program and the accompanying materials \r |
| 5 | # are licensed and made available under the terms and conditions of the BSD License \r |
| 6 | # which accompanies this distribution. The full text of the license may be found at \r |
| 7 | # http:#opensource.org/licenses/bsd-license.php \r |
| 8 | #\r |
| 9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| 10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| 11 | #\r |
| 12 | #=======================================================================================\r |
| 13 | \r |
| 14 | #start of the code section\r |
| 15 | .text \r |
| 16 | .align 3\r |
| 17 | \r |
| 18 | GCC_ASM_EXPORT(monitor_vector_table)\r |
| 19 | GCC_ASM_EXPORT(return_from_exception)\r |
| 20 | GCC_ASM_EXPORT(enter_monitor_mode)\r |
| 21 | GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r |
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22 | GCC_ASM_EXPORT(set_non_secure_mode)\r |
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23 | \r |
| 24 | ASM_PFX(monitor_vector_table):\r |
| 25 | ldr pc, dead\r |
| 26 | ldr pc, dead\r |
| 27 | ldr pc, dead\r |
| 28 | ldr pc, dead\r |
| 29 | ldr pc, dead\r |
| 30 | ldr pc, dead\r |
| 31 | ldr pc, dead\r |
| 32 | ldr pc, dead\r |
| 33 | \r |
| 34 | # arg0: Secure Monitor mode stack\r |
| 35 | ASM_PFX(enter_monitor_mode):\r |
| 36 | mov r2, lr @ Save current lr\r |
| 37 | \r |
| 38 | mrs r1, cpsr @ Save current mode (SVC) in r1\r |
| 39 | bic r3, r1, #0x1f @ Clear all mode bits\r |
| 40 | orr r3, r3, #0x16 @ Set bits for Monitor mode\r |
| 41 | msr cpsr_cxsf, r3 @ We are now in Monitor Mode\r |
| 42 | \r |
| 43 | mov sp, r0 @ Use the passed sp\r |
| 44 | mov lr, r2 @ Use the same lr as before\r |
| 45 | \r |
| 46 | msr spsr_cxsf, r1 @ Use saved mode for the MOVS jump to the kernel\r |
| 47 | bx lr\r |
| 48 | \r |
| 49 | # We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r |
| 50 | # When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r |
| 51 | # 'pc'; we will not change the CPSR flag and it will crash.\r |
| 52 | # The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r |
| 53 | ASM_PFX(return_from_exception):\r |
| 54 | ldr lr, returned_exception\r |
| 55 | \r |
| 56 | #The following instruction breaks the code.\r |
| 57 | #movs pc, lr\r |
| 58 | mrs r2, cpsr\r |
| 59 | bic r2, r2, #0x1f\r |
| 60 | orr r2, r2, #0x13\r |
| 61 | msr cpsr_c, r2\r |
| 62 | \r |
| 63 | returned_exception: @ We are now in non-secure state\r |
| 64 | bx r0\r |
| 65 | \r |
| 66 | # Save the current Program Status Register (PSR) into the Saved PSR\r |
| 67 | ASM_PFX(copy_cpsr_into_spsr):\r |
| 68 | mrs r0, cpsr\r |
| 69 | msr spsr_cxsf, r0\r |
| 70 | bx lr\r |
| 71 | \r |
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72 | # Set the Non Secure Mode\r |
| 73 | ASM_PFX(set_non_secure_mode):\r |
| 74 | push { r1 }\r |
| 75 | and r0, r0, #0x1f @ Keep only the mode bits\r |
| 76 | mrs r1, spsr @ Read the spsr\r |
| 77 | bic r1, r1, #0x1f @ Clear all mode bits\r |
| 78 | orr r1, r1, r0\r |
| 79 | msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)\r |
| 80 | isb\r |
| 81 | pop { r1 }\r |
| 82 | bx lr @ return (hopefully thumb-safe!)\r |
| 83 | \r |
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84 | dead:\r |
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85 | b dead\r |
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86 | \r |
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87 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r |
projects / mirror_edk2.git / blame