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5b1928ff 1/** @file\r
2* Main file supporting the SEC Phase on ARM PLatforms\r
3*\r
a8530889 4* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
5b1928ff 5*\r
6* This program and the accompanying materials\r
7* are licensed and made available under the terms and conditions of the BSD License\r
8* which accompanies this distribution. The full text of the license may be found at\r
9* http://opensource.org/licenses/bsd-license.php\r
10*\r
11* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13*\r
14**/\r
15\r
16#ifndef __SEC_H__\r
17#define __SEC_H__\r
18\r
19#include <Base.h>\r
90d6a1bb 20#include <Library/ArmLib.h>\r
21#include <Library/ArmCpuLib.h>\r
e314d564 22#include <Library/ArmPlatformSecLib.h>\r
5b1928ff 23#include <Library/BaseLib.h>\r
24#include <Library/DebugLib.h>\r
90d6a1bb 25#include <Library/PcdLib.h>\r
5b1928ff 26\r
27#define IS_ALIGNED(Address, Align) (((UINTN)Address & (Align-1)) == 0)\r
28\r
a8530889 29VOID\r
30TrustedWorldInitialization (\r
31 IN UINTN MpId\r
32 );\r
33\r
34VOID\r
35NonTrustedWorldTransition (\r
3d93aeae 36 IN UINTN MpId,\r
37 IN UINTN JumpAddress\r
a8530889 38 );\r
39\r
5b1928ff 40VOID\r
41ArmSetupGicNonSecure (\r
a8530889 42 IN INTN GicDistributorBase,\r
43 IN INTN GicInterruptInterfaceBase\r
5b1928ff 44);\r
45\r
46// Vector Table for Sec Phase\r
47VOID\r
48SecVectorTable (\r
49 VOID\r
50 );\r
51\r
5b1928ff 52VOID\r
53enter_monitor_mode (\r
a8530889 54 IN UINTN MonitorEntryPoint,\r
55 IN UINTN MpId,\r
56 IN VOID* Stack\r
5b1928ff 57 );\r
58\r
59VOID\r
60return_from_exception (\r
a8530889 61 IN UINTN NonSecureBase\r
5b1928ff 62 );\r
63\r
64VOID\r
65copy_cpsr_into_spsr (\r
66 VOID\r
67 );\r
68\r
513aa349 69VOID\r
70set_non_secure_mode (\r
a8530889 71 IN ARM_PROCESSOR_MODE Mode\r
513aa349 72 );\r
73\r
5b1928ff 74VOID\r
75SecCommonExceptionEntry (\r
76 IN UINT32 Entry,\r
77 IN UINT32 LR\r
78 );\r
79\r
80#endif\r