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1fde2f61 1#------------------------------------------------------------------------------ \r
2#\r
4ade93d0 3# ARM EB Entry point. Reset vector in FV header will brach to\r
4# _ModuleEntryPoint. \r
5#\r
6# We use crazy macros, like LoadConstantToReg, since Xcode assembler \r
7# does not support = assembly syntax for ldr.\r
8#\r
cf748a1a 9# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
1fde2f61 10#\r
cf748a1a 11# This program and the accompanying materials\r
1fde2f61 12# are licensed and made available under the terms and conditions of the BSD License\r
13# which accompanies this distribution. The full text of the license may be found at\r
14# http://opensource.org/licenses/bsd-license.php\r
15#\r
16# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
17# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
18#\r
19#------------------------------------------------------------------------------\r
20\r
21#include <AsmMacroIoLib.h>\r
4ade93d0 22#include <Base.h>\r
1fde2f61 23#include <Library/PcdLib.h>\r
4ade93d0 24#include <ArmEb/ArmEb.h>\r
1fde2f61 25\r
26.text\r
27.align 3\r
28\r
29.globl ASM_PFX(CEntryPoint)\r
30.globl ASM_PFX(_ModuleEntryPoint)\r
31\r
32ASM_PFX(_ModuleEntryPoint):\r
4ade93d0 33 \r
34 // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
afdfe8f0 35 // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
36 //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8) \r
4ade93d0 37\r
38 // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
39 mrc p15, 0, r0, c1, c0, 2\r
40 orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)\r
41 mcr p15, 0, r0, c1, c0, 2\r
42 mov r0, #0x40000000 // Set EN bit in FPEXC\r
fe211121 43 mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
4ade93d0 44 \r
afdfe8f0 45 // Set CPU vectors to 0 (which is currently flash)\r
4ade93d0 46 LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
47 mcr p15, 0, r0, c12, c0, 0\r
48 isb // Sync changes to control registers\r
49\r
1fde2f61 50 //\r
51 // Set stack based on PCD values. Need to do it this way to make C code work \r
52 // when it runs from FLASH. \r
53 // \r
4ade93d0 54 LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
55 LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
1fde2f61 56 add r4, r2, r3\r
4ade93d0 57 mov r13, r4\r
1fde2f61 58\r
59 // Call C entry point\r
4ade93d0 60 LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
61 LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
62 blx ASM_PFX(CEntryPoint) \r
1fde2f61 63\r
64ShouldNeverGetHere:\r
4ade93d0 65 // _CEntryPoint should never return \r
1fde2f61 66 b ShouldNeverGetHere\r
67\r
4ade93d0 68 \r