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afdfe8f0 1/** @file\r
2 C Entry point for the SEC. First C code after the reset vector.\r
3\r
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
5 \r
6 This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
16#include <PiPei.h>\r
17#include <Ppi/TemporaryRamSupport.h>\r
18#include <Library/PcdLib.h>\r
19#include <Library/IoLib.h>\r
20#include <Library/BaseLib.h>\r
21#include <Library/BaseMemoryLib.h>\r
22#include <ArmEb/ArmEb.h>\r
23\r
24EFI_STATUS\r
25EFIAPI\r
26SecTemporaryRamSupport (\r
27 IN CONST EFI_PEI_SERVICES **PeiServices,\r
28 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
29 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
30 IN UINTN CopySize\r
31 );\r
32\r
33VOID\r
34SecSwitchStack (\r
35 INTN StackDelta\r
36 );\r
37\r
38TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r
39\r
40EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {\r
41 {\r
42 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
43 &gEfiTemporaryRamSupportPpiGuid,\r
44 &mSecTemporaryRamSupportPpi\r
45 }\r
46};\r
47\r
48\r
49VOID\r
50EFIAPI \r
51_ModuleEntryPoint(\r
52 VOID\r
53 );\r
54\r
55VOID\r
56CEntryPoint (\r
57 IN UINTN TempRamBase,\r
58 IN UINTN TempRamSize,\r
59 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
60 )\r
61{\r
62 EFI_SEC_PEI_HAND_OFF SecCoreData;\r
63\r
64 // Turn off remapping NOR to 0. We can will now see DRAM in low memory (although it is not yet initialized)\r
65 // note: this makes SEC platform-specific for the EB platform\r
66 MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE\r
67 \r
68 //\r
69 // Bind this information into the SEC hand-off state\r
70 // Note: this must be in sync with the stuff in the asm file\r
71 // Note also: HOBs (pei temp ram) MUST be above stack\r
72 //\r
73 SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
74 SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);\r
75 SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);\r
76 SecCoreData.TemporaryRamBase = (VOID*)(UINTN)TempRamBase; \r
77 SecCoreData.TemporaryRamSize = TempRamSize;\r
78 SecCoreData.PeiTemporaryRamBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize / 2));\r
79 SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;\r
80 SecCoreData.StackBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase);\r
81 SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;\r
82 \r
83 // jump to pei core entry point\r
84 (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);\r
85}\r
86\r
87EFI_STATUS\r
88EFIAPI\r
89SecTemporaryRamSupport (\r
90 IN CONST EFI_PEI_SERVICES **PeiServices,\r
91 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
92 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
93 IN UINTN CopySize\r
94 )\r
95{\r
96 //\r
97 // Migrate the whole temporary memory to permenent memory.\r
98 // \r
99 CopyMem (\r
100 (VOID*)(UINTN)PermanentMemoryBase, \r
101 (VOID*)(UINTN)TemporaryMemoryBase, \r
102 CopySize\r
103 );\r
104\r
105 SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r
106\r
107 //\r
108 // We need *not* fix the return address because currently, \r
109 // The PeiCore is excuted in flash.\r
110 //\r
111\r
112 //\r
113 // Simulate to invalid temporary memory, terminate temporary memory\r
114 // \r
115 //ZeroMem ((VOID*)(UINTN)TemporaryMemoryBase, CopySize);\r
116 \r
117 return EFI_SUCCESS;\r
118}\r
119\r