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ArmVirtPkg/RelocatableVirtHelper: use correct FindMemNode argument order
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1#\r
2# Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
3#\r
4# This program and the accompanying materials\r
5# are licensed and made available under the terms and conditions of the BSD License\r
6# which accompanies this distribution. The full text of the license may be found at\r
7# http://opensource.org/licenses/bsd-license.php\r
8#\r
9# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11#\r
12#\r
13\r
14#include <AsmMacroIoLibV8.h>\r
15#include <Base.h>\r
16#include <Library/ArmLib.h>\r
17#include <Library/PcdLib.h>\r
18#include <AutoGen.h>\r
19\r
20.text\r
21.align 2\r
22\r
23GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r
24GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
25GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
26GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
27GCC_ASM_EXPORT(ArmGetPhysAddrTop)\r
28\r
29GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
30GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
31GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)\r
32\r
33.LArm64LinuxMagic:\r
34 .byte 0x41, 0x52, 0x4d, 0x64\r
35\r
36// VOID\r
37// ArmPlatformPeiBootAction (\r
38// VOID *DeviceTreeBaseAddress, // passed by loader in x0\r
39// VOID *ImageBase // passed by FDF trampoline in x1\r
40// );\r
41ASM_PFX(ArmPlatformPeiBootAction):\r
42 //\r
43 // If we are booting from RAM using the Linux kernel boot protocol, x0 will\r
44 // point to the DTB image in memory. Otherwise, use the default value defined\r
45 // by the platform.\r
46 //\r
47 cbnz x0, 0f\r
48 ldr x0, PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r
49\r
500:mov x29, x30 // preserve LR\r
51 mov x28, x0 // preserve DTB pointer\r
52 mov x27, x1 // preserve base of image pointer\r
53\r
54 //\r
55 // The base of the runtime image has been preserved in x1. Check whether\r
56 // the expected magic number can be found in the header.\r
57 //\r
58 ldr w8, .LArm64LinuxMagic\r
59 ldr w9, [x1, #0x38]\r
60 cmp w8, w9\r
61 bne .Lout\r
62\r
63 //\r
64 //\r
65 // OK, so far so good. We have confirmed that we likely have a DTB and are\r
66 // booting via the arm64 Linux boot protocol. Update the base-of-image PCD\r
67 // to the actual relocated value, and add the shift of PcdFdBaseAddress to\r
68 // PcdFvBaseAddress as well\r
69 //\r
70 adr x8, PcdGet64 (PcdFdBaseAddress)\r
71 adr x9, PcdGet64 (PcdFvBaseAddress)\r
72 ldr x6, [x8]\r
73 ldr x7, [x9]\r
74 sub x7, x7, x6\r
75 add x7, x7, x1\r
76 str x1, [x8]\r
77 str x7, [x9]\r
78\r
79 //\r
80 // Discover the memory size and offset from the DTB, and record in the\r
81 // respective PCDs. This will also return false if a corrupt DTB is\r
82 // encountered. Since we are calling a C function, use the window at the\r
83 // beginning of the FD image as a temp stack.\r
84 //\r
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85 adr x1, PcdGet64 (PcdSystemMemoryBase)\r
86 adr x2, PcdGet64 (PcdSystemMemorySize)\r
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87 mov sp, x7\r
88 bl FindMemnode\r
89 cbz x0, .Lout\r
90\r
91 //\r
92 // Copy the DTB to the slack space right after the 64 byte arm64/Linux style\r
93 // image header at the base of this image (defined in the FDF), and record the\r
94 // pointer in PcdDeviceTreeInitialBaseAddress.\r
95 //\r
96 adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r
97 add x27, x27, #0x40\r
98 str x27, [x8]\r
99\r
100 mov x0, x27\r
101 mov x1, x28\r
102 bl CopyFdt\r
103\r
104.Lout:\r
105 ret x29\r
106\r
107//UINTN\r
108//ArmPlatformGetPrimaryCoreMpId (\r
109// VOID\r
110// );\r
111ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r
112 LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)\r
113 ldrh w0, [x0]\r
114 ret\r
115\r
116//UINTN\r
117//ArmPlatformIsPrimaryCore (\r
118// IN UINTN MpId\r
119// );\r
120ASM_PFX(ArmPlatformIsPrimaryCore):\r
121 mov x0, #1\r
122 ret\r
123\r
124//UINTN\r
125//ArmPlatformGetCorePosition (\r
126// IN UINTN MpId\r
127// );\r
128// With this function: CorePos = (ClusterId * 4) + CoreId\r
129ASM_PFX(ArmPlatformGetCorePosition):\r
130 and x1, x0, #ARM_CORE_MASK\r
131 and x0, x0, #ARM_CLUSTER_MASK\r
132 add x0, x1, x0, LSR #6\r
133 ret\r
134\r
135//EFI_PHYSICAL_ADDRESS\r
136//GetPhysAddrTop (\r
137// VOID\r
138// );\r
139ASM_PFX(ArmGetPhysAddrTop):\r
140 mrs x0, id_aa64mmfr0_el1\r
141 adr x1, .LPARanges\r
142 and x0, x0, #7\r
143 ldrb w1, [x1, x0]\r
144 mov x0, #1\r
145 lsl x0, x0, x1\r
146 ret\r
147\r
148//\r
149// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the\r
150// physical address space support on this CPU:\r
151// 0 == 32 bits, 1 == 36 bits, etc etc\r
152// 6 and 7 are reserved\r
153//\r
154.LPARanges:\r
155 .byte 32, 36, 40, 42, 44, 48, -1, -1\r
156\r
157ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r