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577393c2 AB |
1 | #\r |
2 | # Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
dfc28388 | 3 | # Copyright (c) 2016, Linaro Limited. All rights reserved.\r |
577393c2 AB |
4 | #\r |
5 | # This program and the accompanying materials\r | |
6 | # are licensed and made available under the terms and conditions of the BSD License\r | |
7 | # which accompanies this distribution. The full text of the license may be found at\r | |
8 | # http://opensource.org/licenses/bsd-license.php\r | |
9 | #\r | |
10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | #\r | |
13 | #\r | |
14 | \r | |
15 | #include <AsmMacroIoLibV8.h>\r | |
577393c2 | 16 | #include <Library/ArmLib.h>\r |
577393c2 AB |
17 | \r |
18 | // VOID\r | |
19 | // ArmPlatformPeiBootAction (\r | |
20 | // VOID *DeviceTreeBaseAddress, // passed by loader in x0\r | |
21 | // VOID *ImageBase // passed by FDF trampoline in x1\r | |
22 | // );\r | |
dfc28388 | 23 | ASM_FUNC(ArmPlatformPeiBootAction)\r |
577393c2 AB |
24 | //\r |
25 | // If we are booting from RAM using the Linux kernel boot protocol, x0 will\r | |
26 | // point to the DTB image in memory. Otherwise, use the default value defined\r | |
27 | // by the platform.\r | |
28 | //\r | |
29 | cbnz x0, 0f\r | |
30 | ldr x0, PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r | |
31 | \r | |
32 | 0:mov x29, x30 // preserve LR\r | |
33 | mov x28, x0 // preserve DTB pointer\r | |
34 | mov x27, x1 // preserve base of image pointer\r | |
35 | \r | |
36 | //\r | |
37 | // The base of the runtime image has been preserved in x1. Check whether\r | |
38 | // the expected magic number can be found in the header.\r | |
39 | //\r | |
40 | ldr w8, .LArm64LinuxMagic\r | |
41 | ldr w9, [x1, #0x38]\r | |
42 | cmp w8, w9\r | |
43 | bne .Lout\r | |
44 | \r | |
45 | //\r | |
46 | //\r | |
47 | // OK, so far so good. We have confirmed that we likely have a DTB and are\r | |
48 | // booting via the arm64 Linux boot protocol. Update the base-of-image PCD\r | |
49 | // to the actual relocated value, and add the shift of PcdFdBaseAddress to\r | |
50 | // PcdFvBaseAddress as well\r | |
51 | //\r | |
52 | adr x8, PcdGet64 (PcdFdBaseAddress)\r | |
53 | adr x9, PcdGet64 (PcdFvBaseAddress)\r | |
54 | ldr x6, [x8]\r | |
55 | ldr x7, [x9]\r | |
56 | sub x7, x7, x6\r | |
57 | add x7, x7, x1\r | |
58 | str x1, [x8]\r | |
59 | str x7, [x9]\r | |
60 | \r | |
61 | //\r | |
62 | // Discover the memory size and offset from the DTB, and record in the\r | |
63 | // respective PCDs. This will also return false if a corrupt DTB is\r | |
64 | // encountered. Since we are calling a C function, use the window at the\r | |
65 | // beginning of the FD image as a temp stack.\r | |
66 | //\r | |
8457f5e4 AB |
67 | adr x1, PcdGet64 (PcdSystemMemoryBase)\r |
68 | adr x2, PcdGet64 (PcdSystemMemorySize)\r | |
577393c2 AB |
69 | mov sp, x7\r |
70 | bl FindMemnode\r | |
71 | cbz x0, .Lout\r | |
72 | \r | |
73 | //\r | |
74 | // Copy the DTB to the slack space right after the 64 byte arm64/Linux style\r | |
75 | // image header at the base of this image (defined in the FDF), and record the\r | |
76 | // pointer in PcdDeviceTreeInitialBaseAddress.\r | |
77 | //\r | |
78 | adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r | |
79 | add x27, x27, #0x40\r | |
80 | str x27, [x8]\r | |
81 | \r | |
82 | mov x0, x27\r | |
83 | mov x1, x28\r | |
84 | bl CopyFdt\r | |
85 | \r | |
86 | .Lout:\r | |
87 | ret x29\r | |
88 | \r | |
dfc28388 AB |
89 | .LArm64LinuxMagic:\r |
90 | .byte 0x41, 0x52, 0x4d, 0x64\r | |
91 | \r | |
577393c2 AB |
92 | //UINTN\r |
93 | //ArmPlatformGetPrimaryCoreMpId (\r | |
94 | // VOID\r | |
95 | // );\r | |
dfc28388 AB |
96 | ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)\r |
97 | MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))\r | |
577393c2 AB |
98 | ret\r |
99 | \r | |
100 | //UINTN\r | |
101 | //ArmPlatformIsPrimaryCore (\r | |
102 | // IN UINTN MpId\r | |
103 | // );\r | |
dfc28388 | 104 | ASM_FUNC(ArmPlatformIsPrimaryCore)\r |
577393c2 AB |
105 | mov x0, #1\r |
106 | ret\r | |
107 | \r | |
108 | //UINTN\r | |
109 | //ArmPlatformGetCorePosition (\r | |
110 | // IN UINTN MpId\r | |
111 | // );\r | |
112 | // With this function: CorePos = (ClusterId * 4) + CoreId\r | |
dfc28388 | 113 | ASM_FUNC(ArmPlatformGetCorePosition)\r |
577393c2 AB |
114 | and x1, x0, #ARM_CORE_MASK\r |
115 | and x0, x0, #ARM_CLUSTER_MASK\r | |
116 | add x0, x1, x0, LSR #6\r | |
117 | ret\r | |
118 | \r | |
119 | //EFI_PHYSICAL_ADDRESS\r | |
120 | //GetPhysAddrTop (\r | |
121 | // VOID\r | |
122 | // );\r | |
dfc28388 | 123 | ASM_FUNC(ArmGetPhysAddrTop)\r |
577393c2 AB |
124 | mrs x0, id_aa64mmfr0_el1\r |
125 | adr x1, .LPARanges\r | |
126 | and x0, x0, #7\r | |
127 | ldrb w1, [x1, x0]\r | |
128 | mov x0, #1\r | |
129 | lsl x0, x0, x1\r | |
130 | ret\r | |
131 | \r | |
132 | //\r | |
133 | // Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the\r | |
134 | // physical address space support on this CPU:\r | |
135 | // 0 == 32 bits, 1 == 36 bits, etc etc\r | |
136 | // 6 and 7 are reserved\r | |
137 | //\r | |
138 | .LPARanges:\r | |
139 | .byte 32, 36, 40, 42, 44, 48, -1, -1\r | |
140 | \r | |
141 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r |