projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 577393c2 AB |
1 | #\r |
| 2 | # Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
| 3 | # Copyright (c) 2014, Linaro Limited. All rights reserved.\r | |
| 4 | #\r | |
| 5 | # This program and the accompanying materials\r | |
| 6 | # are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | # which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | # http://opensource.org/licenses/bsd-license.php\r | |
| 9 | #\r | |
| 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | #\r | |
| 13 | #\r | |
| 14 | \r | |
| 15 | #include <AsmMacroIoLib.h>\r | |
| 16 | #include <Base.h>\r | |
| 17 | #include <Library/ArmLib.h>\r | |
| 18 | #include <Library/PcdLib.h>\r | |
| 19 | #include <AutoGen.h>\r | |
| 20 | \r | |
| 21 | .text\r | |
| 22 | .align 2\r | |
| 23 | \r | |
| 24 | GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r | |
| 25 | GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r | |
| 26 | GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r | |
| 27 | GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r | |
| 28 | GCC_ASM_EXPORT(ArmGetPhysAddrTop)\r | |
| 29 | \r | |
| 30 | GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r | |
| 31 | GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r | |
| 32 | GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)\r | |
| 33 | \r | |
| 34 | .LArm32LinuxMagic:\r | |
| 35 | .byte 0x18, 0x28, 0x6f, 0x01\r | |
| 36 | \r | |
| 37 | ASM_PFX(ArmPlatformPeiBootAction):\r | |
| 38 | //\r | |
| 39 | // If we are booting from RAM using the Linux kernel boot protocol, r0 will\r | |
| 40 | // point to the DTB image in memory. Otherwise, use the default value defined\r | |
| 41 | // by the platform.\r | |
| 42 | //\r | |
| 43 | teq r0, #0\r | |
| 44 | bne 0f\r | |
| 45 | ldr r0, =PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r | |
| 46 | \r | |
| 47 | 0:mov r11, r14 // preserve LR\r | |
| 48 | mov r10, r0 // preserve DTB pointer\r | |
| 49 | mov r9, r1 // preserve base of image pointer\r | |
| 50 | \r | |
| 51 | //\r | |
| 52 | // The base of the runtime image has been preserved in r1. Check whether\r | |
| 53 | // the expected magic number can be found in the header.\r | |
| 54 | //\r | |
| 55 | ldr r8, .LArm32LinuxMagic\r | |
| 56 | ldr r7, [r1, #0x24]\r | |
| 57 | cmp r7, r8\r | |
| 58 | bne .Lout\r | |
| 59 | \r | |
| 60 | //\r | |
| 61 | //\r | |
| 62 | // OK, so far so good. We have confirmed that we likely have a DTB and are\r | |
| 63 | // booting via the ARM Linux boot protocol. Update the base-of-image PCD\r | |
| 64 | // to the actual relocated value, and add the shift of PcdFdBaseAddress to\r | |
| 65 | // PcdFvBaseAddress as well\r | |
| 66 | //\r | |
| 67 | ldr r8, =PcdGet64 (PcdFdBaseAddress)\r | |
| 68 | ldr r7, =PcdGet64 (PcdFvBaseAddress)\r | |
| 69 | ldr r6, [r8]\r | |
| 70 | ldr r5, [r7]\r | |
| 71 | sub r5, r5, r6\r | |
| 72 | add r5, r5, r1\r | |
| 73 | str r1, [r8]\r | |
| 74 | str r5, [r7]\r | |
| 75 | \r | |
| 76 | //\r | |
| 77 | // Discover the memory size and offset from the DTB, and record in the\r | |
| 78 | // respective PCDs. This will also return false if a corrupt DTB is\r | |
| 79 | // encountered. Since we are calling a C function, use the window at the\r | |
| 80 | // beginning of the FD image as a temp stack.\r | |
| 81 | //\r | |
| 8457f5e4 AB |
82 | ldr r1, =PcdGet64 (PcdSystemMemoryBase)\r |
| 83 | ldr r2, =PcdGet64 (PcdSystemMemorySize)\r | |
| 577393c2 AB |
84 | mov sp, r5\r |
| 85 | bl FindMemnode\r | |
| 86 | teq r0, #0\r | |
| 87 | beq .Lout\r | |
| 88 | \r | |
| 89 | //\r | |
| 90 | // Copy the DTB to the slack space right after the 64 byte arm64/Linux style\r | |
| 91 | // image header at the base of this image (defined in the FDF), and record the\r | |
| 92 | // pointer in PcdDeviceTreeInitialBaseAddress.\r | |
| 93 | //\r | |
| 94 | ldr r8, =PcdGet64 (PcdDeviceTreeInitialBaseAddress)\r | |
| 95 | add r9, r9, #0x40\r | |
| 96 | str r9, [r8]\r | |
| 97 | \r | |
| 98 | mov r0, r9\r | |
| 99 | mov r1, r10\r | |
| 100 | bl CopyFdt\r | |
| 101 | \r | |
| 102 | .Lout:\r | |
| 103 | bx r11\r | |
| 104 | \r | |
| 105 | //UINTN\r | |
| 106 | //ArmPlatformGetPrimaryCoreMpId (\r | |
| 107 | // VOID\r | |
| 108 | // );\r | |
| 109 | ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r | |
| 110 | LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r | |
| 111 | ldr r0, [r0]\r | |
| 112 | bx lr\r | |
| 113 | \r | |
| 114 | //UINTN\r | |
| 115 | //ArmPlatformIsPrimaryCore (\r | |
| 116 | // IN UINTN MpId\r | |
| 117 | // );\r | |
| 118 | ASM_PFX(ArmPlatformIsPrimaryCore):\r | |
| 119 | mov r0, #1\r | |
| 120 | bx lr\r | |
| 121 | \r | |
| 122 | //UINTN\r | |
| 123 | //ArmPlatformGetCorePosition (\r | |
| 124 | // IN UINTN MpId\r | |
| 125 | // );\r | |
| 126 | // With this function: CorePos = (ClusterId * 4) + CoreId\r | |
| 127 | ASM_PFX(ArmPlatformGetCorePosition):\r | |
| 128 | and r1, r0, #ARM_CORE_MASK\r | |
| 129 | and r0, r0, #ARM_CLUSTER_MASK\r | |
| 130 | add r0, r1, r0, LSR #6\r | |
| 131 | bx lr\r | |
| 132 | \r | |
| 133 | //EFI_PHYSICAL_ADDRESS\r | |
| 134 | //GetPhysAddrTop (\r | |
| 135 | // VOID\r | |
| 136 | // );\r | |
| 137 | ASM_PFX(ArmGetPhysAddrTop):\r | |
| 138 | mov r0, #0x00000000\r | |
| 139 | mov r1, #0x10000\r | |
| 140 | bx lr\r | |
| 141 | \r |