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1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r | |
4 | Copyright (c) 2014 - 2018, Linaro Ltd. All rights reserved.<BR>\r | |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #include <Library/ArmGenericTimerCounterLib.h>\r | |
17 | #include <Library/ArmLib.h>\r | |
18 | \r | |
19 | VOID\r | |
20 | EFIAPI\r | |
21 | ArmGenericTimerEnableTimer (\r | |
22 | VOID\r | |
23 | )\r | |
24 | {\r | |
25 | UINTN TimerCtrlReg;\r | |
26 | \r | |
27 | TimerCtrlReg = ArmReadCntvCtl ();\r | |
28 | TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;\r | |
29 | ArmWriteCntvCtl (TimerCtrlReg);\r | |
30 | }\r | |
31 | \r | |
32 | VOID\r | |
33 | EFIAPI\r | |
34 | ArmGenericTimerReenableTimer (\r | |
35 | VOID\r | |
36 | )\r | |
37 | {\r | |
38 | UINTN TimerCtrlReg;\r | |
39 | \r | |
40 | TimerCtrlReg = ArmReadCntvCtl ();\r | |
41 | TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;\r | |
42 | \r | |
43 | //\r | |
44 | // When running under Xen, we need to unmask the interrupt on the timer side\r | |
45 | // as Xen will mask it when servicing the interrupt at the hypervisor level\r | |
46 | // and delivering the virtual timer interrupt to the guest. Otherwise, the\r | |
47 | // interrupt will fire again, trapping into the hypervisor again, etc. etc.\r | |
48 | //\r | |
49 | TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;\r | |
50 | ArmWriteCntvCtl (TimerCtrlReg);\r | |
51 | }\r | |
52 | \r | |
53 | VOID\r | |
54 | EFIAPI\r | |
55 | ArmGenericTimerDisableTimer (\r | |
56 | VOID\r | |
57 | )\r | |
58 | {\r | |
59 | UINTN TimerCtrlReg;\r | |
60 | \r | |
61 | TimerCtrlReg = ArmReadCntvCtl ();\r | |
62 | TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;\r | |
63 | ArmWriteCntvCtl (TimerCtrlReg);\r | |
64 | }\r | |
65 | \r | |
66 | VOID\r | |
67 | EFIAPI\r | |
68 | ArmGenericTimerSetTimerFreq (\r | |
69 | IN UINTN FreqInHz\r | |
70 | )\r | |
71 | {\r | |
72 | ArmWriteCntFrq (FreqInHz);\r | |
73 | }\r | |
74 | \r | |
75 | UINTN\r | |
76 | EFIAPI\r | |
77 | ArmGenericTimerGetTimerFreq (\r | |
78 | VOID\r | |
79 | )\r | |
80 | {\r | |
81 | return ArmReadCntFrq ();\r | |
82 | }\r | |
83 | \r | |
84 | UINTN\r | |
85 | EFIAPI\r | |
86 | ArmGenericTimerGetTimerVal (\r | |
87 | VOID\r | |
88 | )\r | |
89 | {\r | |
90 | return ArmReadCntvTval ();\r | |
91 | }\r | |
92 | \r | |
93 | \r | |
94 | VOID\r | |
95 | EFIAPI\r | |
96 | ArmGenericTimerSetTimerVal (\r | |
97 | IN UINTN Value\r | |
98 | )\r | |
99 | {\r | |
100 | ArmWriteCntvTval (Value);\r | |
101 | }\r | |
102 | \r | |
103 | UINT64\r | |
104 | EFIAPI\r | |
105 | ArmGenericTimerGetSystemCount (\r | |
106 | VOID\r | |
107 | )\r | |
108 | {\r | |
109 | return ArmReadCntvCt ();\r | |
110 | }\r | |
111 | \r | |
112 | UINTN\r | |
113 | EFIAPI\r | |
114 | ArmGenericTimerGetTimerCtrlReg (\r | |
115 | VOID\r | |
116 | )\r | |
117 | {\r | |
118 | return ArmReadCntvCtl ();\r | |
119 | }\r | |
120 | \r | |
121 | VOID\r | |
122 | EFIAPI\r | |
123 | ArmGenericTimerSetTimerCtrlReg (\r | |
124 | UINTN Value\r | |
125 | )\r | |
126 | {\r | |
127 | ArmWriteCntvCtl (Value);\r | |
128 | }\r | |
129 | \r | |
130 | UINT64\r | |
131 | EFIAPI\r | |
132 | ArmGenericTimerGetCompareVal (\r | |
133 | VOID\r | |
134 | )\r | |
135 | {\r | |
136 | return ArmReadCntvCval ();\r | |
137 | }\r | |
138 | \r | |
139 | VOID\r | |
140 | EFIAPI\r | |
141 | ArmGenericTimerSetCompareVal (\r | |
142 | IN UINT64 Value\r | |
143 | )\r | |
144 | {\r | |
145 | ArmWriteCntvCval (Value);\r | |
146 | }\r |