ArmVirtPkg/PrePi: move DRAM discovery code into PrePi

[mirror_edk2.git] / ArmVirtPkg / PrePi / PrePi.c

/** @file\r
*\r
*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include <PiPei.h>\r
\r
#include <Library/PrePiLib.h>\r
#include <Library/PrintLib.h>\r
#include <Library/PeCoffGetEntryPointLib.h>\r
#include <Library/PrePiHobListPointerLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/PerformanceLib.h>\r
#include <Library/CacheMaintenanceLib.h>\r
\r
#include <Ppi/GuidedSectionExtraction.h>\r
#include <Ppi/ArmMpCoreInfo.h>\r
#include <Guid/LzmaDecompress.h>\r
\r
#include "PrePi.h"\r
#include "LzmaDecompress.h"\r
\r
VOID\r
EFIAPI\r
ProcessLibraryConstructorList (\r
  VOID\r
  );\r
\r
VOID\r
PrePiMain (\r
  IN  UINTN                     UefiMemoryBase,\r
  IN  UINTN                     StacksBase,\r
  IN  UINT64                    StartTimeStamp\r
  )\r
{\r
  EFI_HOB_HANDOFF_INFO_TABLE*   HobList;\r
  EFI_STATUS                    Status;\r
  CHAR8                         Buffer[100];\r
  UINTN                         CharCount;\r
  UINTN                         StacksSize;\r
\r
  // Initialize the architecture specific bits\r
  ArchInitialize ();\r
\r
  // Declare the PI/UEFI memory region\r
  HobList = HobConstructor (\r
    (VOID*)UefiMemoryBase,\r
    FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
    (VOID*)UefiMemoryBase,\r
    (VOID*)StacksBase  // The top of the UEFI Memory is reserved for the stacks\r
    );\r
  PrePeiSetHobList (HobList);\r
\r
  //\r
  // Ensure that the loaded image is invalidated in the caches, so that any\r
  // modifications we made with the caches and MMU off (such as the applied\r
  // relocations) don't become invisible once we turn them on.\r
  //\r
  InvalidateDataCacheRange((VOID *)(UINTN)PcdGet64 (PcdFdBaseAddress), PcdGet32 (PcdFdSize));\r
\r
  // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
  Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
  ASSERT_EFI_ERROR (Status);\r
\r
  // Initialize the Serial Port\r
  SerialPortInitialize ();\r
  CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
    (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
  SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
\r
  // Create the Stacks HOB (reserve the memory for all stacks)\r
  StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
  BuildStackHob (StacksBase, StacksSize);\r
\r
  //TODO: Call CpuPei as a library\r
  BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
  // Set the Boot Mode\r
  SetBootMode (ArmPlatformGetBootMode ());\r
\r
  // Initialize Platform HOBs (CpuHob and FvHob)\r
  Status = PlatformPeim ();\r
  ASSERT_EFI_ERROR (Status);\r
\r
  // Now, the HOB List has been initialized, we can register performance information\r
  PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
\r
  // SEC phase needs to run library constructors by hand.\r
  ProcessLibraryConstructorList ();\r
\r
  // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
  BuildPeCoffLoaderHob ();\r
  BuildExtractSectionHob (\r
    &gLzmaCustomDecompressGuid,\r
    LzmaGuidedSectionGetInfo,\r
    LzmaGuidedSectionExtraction\r
    );\r
\r
  // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
  Status = DecompressFirstFv ();\r
  ASSERT_EFI_ERROR (Status);\r
\r
  // Load the DXE Core and transfer control to it\r
  Status = LoadDxeCoreFromFv (NULL, 0);\r
  ASSERT_EFI_ERROR (Status);\r
}\r
\r
VOID\r
CEntryPoint (\r
  IN  UINTN                     MpId,\r
  IN  UINTN                     UefiMemoryBase,\r
  IN  UINTN                     StacksBase\r
  )\r
{\r
  UINT64   StartTimeStamp;\r
\r
  // Initialize the platform specific controllers\r
  ArmPlatformInitialize (MpId);\r
\r
  if (PerformanceMeasurementEnabled ()) {\r
    // Initialize the Timer Library to setup the Timer HW controller\r
    TimerConstructor ();\r
    // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
    StartTimeStamp = GetPerformanceCounter ();\r
  } else {\r
    StartTimeStamp = 0;\r
  }\r
\r
  // Data Cache enabled on Primary core when MMU is enabled.\r
  ArmDisableDataCache ();\r
  // Invalidate instruction cache\r
  ArmInvalidateInstructionCache ();\r
  // Enable Instruction Caches on all cores.\r
  ArmEnableInstructionCache ();\r
\r
  PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
\r
  // DXE Core should always load and never return\r
  ASSERT (FALSE);\r
}\r