BaseTools: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / BaseTools / Source / C / Common / PeCoffLoaderEx.c

/** @file\r
IA32 and X64 Specific relocation fixups\r
\r
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
--*/\r
\r
#include <Common/UefiBaseTypes.h>\r
#include <IndustryStandard/PeImage.h>\r
#include "PeCoffLib.h"\r
#include "CommonLib.h"\r
#include "EfiUtilityMsgs.h"\r
\r
\r
#define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r
\r
#define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \\r
          ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
\r
#define IMM64_IMM7B_INST_WORD_X         3\r
#define IMM64_IMM7B_SIZE_X              7\r
#define IMM64_IMM7B_INST_WORD_POS_X     4\r
#define IMM64_IMM7B_VAL_POS_X           0\r
\r
#define IMM64_IMM9D_INST_WORD_X         3\r
#define IMM64_IMM9D_SIZE_X              9\r
#define IMM64_IMM9D_INST_WORD_POS_X     18\r
#define IMM64_IMM9D_VAL_POS_X           7\r
\r
#define IMM64_IMM5C_INST_WORD_X         3\r
#define IMM64_IMM5C_SIZE_X              5\r
#define IMM64_IMM5C_INST_WORD_POS_X     13\r
#define IMM64_IMM5C_VAL_POS_X           16\r
\r
#define IMM64_IC_INST_WORD_X            3\r
#define IMM64_IC_SIZE_X                 1\r
#define IMM64_IC_INST_WORD_POS_X        12\r
#define IMM64_IC_VAL_POS_X              21\r
\r
#define IMM64_IMM41a_INST_WORD_X        1\r
#define IMM64_IMM41a_SIZE_X             10\r
#define IMM64_IMM41a_INST_WORD_POS_X    14\r
#define IMM64_IMM41a_VAL_POS_X          22\r
\r
#define IMM64_IMM41b_INST_WORD_X        1\r
#define IMM64_IMM41b_SIZE_X             8\r
#define IMM64_IMM41b_INST_WORD_POS_X    24\r
#define IMM64_IMM41b_VAL_POS_X          32\r
\r
#define IMM64_IMM41c_INST_WORD_X        2\r
#define IMM64_IMM41c_SIZE_X             23\r
#define IMM64_IMM41c_INST_WORD_POS_X    0\r
#define IMM64_IMM41c_VAL_POS_X          40\r
\r
#define IMM64_SIGN_INST_WORD_X          3\r
#define IMM64_SIGN_SIZE_X               1\r
#define IMM64_SIGN_INST_WORD_POS_X      27\r
#define IMM64_SIGN_VAL_POS_X            63\r
\r
RETURN_STATUS\r
PeCoffLoaderRelocateIa32Image (\r
  IN UINT16      *Reloc,\r
  IN OUT CHAR8   *Fixup,\r
  IN OUT CHAR8   **FixupData,\r
  IN UINT64      Adjust\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Performs an IA-32 specific relocation fixup\r
\r
Arguments:\r
\r
  Reloc      - Pointer to the relocation record\r
\r
  Fixup      - Pointer to the address to fix up\r
\r
  FixupData  - Pointer to a buffer to log the fixups\r
\r
  Adjust     - The offset to adjust the fixup\r
\r
Returns:\r
\r
  EFI_UNSUPPORTED   - Unsupported now\r
\r
--*/\r
{\r
  return RETURN_UNSUPPORTED;\r
}\r
\r
\r
/**\r
  Pass in a pointer to an ARM MOVT or MOVW immediate instruction and\r
  return the immediate data encoded in the instruction\r
\r
  @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction\r
\r
  @return Immediate address encoded in the instruction\r
\r
**/\r
UINT16\r
ThumbMovtImmediateAddress (\r
  IN UINT16 *Instruction\r
  )\r
{\r
  UINT32  Movt;\r
  UINT16  Address;\r
\r
  // Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction\r
  // Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000\r
  Movt = (*Instruction << 16) | (*(Instruction + 1));\r
\r
  // imm16 = imm4:i:imm3:imm8\r
  //         imm4 -> Bit19:Bit16\r
  //         i    -> Bit26\r
  //         imm3 -> Bit14:Bit12\r
  //         imm8 -> Bit7:Bit0\r
  Address  = (UINT16)(Movt & 0x000000ff);          // imm8\r
  Address |= (UINT16)((Movt >> 4) &  0x0000f700);  // imm4 imm3\r
  Address |= (((Movt & BIT26) != 0) ? BIT11 : 0);  // i\r
  return Address;\r
}\r
\r
\r
/**\r
  Update an ARM MOVT or MOVW immediate instruction immediate data.\r
\r
  @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction\r
  @param  Address       New address to patch into the instruction\r
**/\r
VOID\r
ThumbMovtImmediatePatch (\r
  IN OUT UINT16 *Instruction,\r
  IN     UINT16 Address\r
  )\r
{\r
  UINT16  Patch;\r
\r
  // First 16-bit chunk of instruction\r
  Patch  = ((Address >> 12) & 0x000f);             // imm4\r
  Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i\r
  *Instruction = (*Instruction & ~0x040f) | Patch;\r
\r
  // Second 16-bit chunk of instruction\r
  Patch  =  Address & 0x000000ff;          // imm8\r
  Patch |=  ((Address << 4) & 0x00007000); // imm3\r
  Instruction++;\r
  *Instruction = (*Instruction & ~0x70ff) | Patch;\r
}\r
\r
/**\r
  Pass in a pointer to an ARM MOVW/MOVT instruction pair and\r
  return the immediate data encoded in the two` instruction\r
\r
  @param  Instructions  Pointer to ARM MOVW/MOVT instruction pair\r
\r
  @return Immediate address encoded in the instructions\r
\r
**/\r
UINT32\r
EFIAPI\r
ThumbMovwMovtImmediateAddress (\r
  IN UINT16 *Instructions\r
  )\r
{\r
  UINT16  *Word;\r
  UINT16  *Top;\r
\r
  Word = Instructions;  // MOVW\r
  Top  = Word + 2;      // MOVT\r
\r
  return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);\r
}\r
\r
\r
/**\r
  Update an ARM MOVW/MOVT immediate instruction instruction pair.\r
\r
  @param  Instructions  Pointer to ARM MOVW/MOVT instruction pair\r
  @param  Address       New address to patch into the instructions\r
**/\r
VOID\r
EFIAPI\r
ThumbMovwMovtImmediatePatch (\r
  IN OUT UINT16 *Instructions,\r
  IN     UINT32 Address\r
  )\r
{\r
  UINT16  *Word;\r
  UINT16  *Top;\r
\r
  Word = (UINT16 *)Instructions;  // MOVW\r
  Top  = Word + 2;                // MOVT\r
\r
  ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));\r
  ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));\r
}\r
\r
\r
/**\r
  Performs an ARM-based specific relocation fixup and is a no-op on other\r
  instruction sets.\r
\r
  @param  Reloc       Pointer to the relocation record.\r
  @param  Fixup       Pointer to the address to fix up.\r
  @param  FixupData   Pointer to a buffer to log the fixups.\r
  @param  Adjust      The offset to adjust the fixup.\r
\r
  @return Status code.\r
\r
**/\r
RETURN_STATUS\r
PeCoffLoaderRelocateArmImage (\r
  IN UINT16      **Reloc,\r
  IN OUT CHAR8   *Fixup,\r
  IN OUT CHAR8   **FixupData,\r
  IN UINT64      Adjust\r
  )\r
{\r
  UINT16      *Fixup16;\r
  UINT32      FixupVal;\r
\r
  Fixup16   = (UINT16 *) Fixup;\r
\r
  switch ((**Reloc) >> 12) {\r
\r
  case EFI_IMAGE_REL_BASED_ARM_MOV32T:\r
    FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;\r
    ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);\r
\r
\r
    if (*FixupData != NULL) {\r
      *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));\r
      CopyMem (*FixupData, Fixup16, sizeof (UINT64));\r
      *FixupData = *FixupData + sizeof(UINT64);\r
    }\r
    break;\r
\r
  case EFI_IMAGE_REL_BASED_ARM_MOV32A:\r
     // break omitted - ARM instruction encoding not implemented\r
  default:\r
    return RETURN_UNSUPPORTED;\r
  }\r
\r
  return RETURN_SUCCESS;\r
}\r