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f51461c8 1/** @file\r
97fa0ee9 2Elf64 convert solution\r
f51461c8 3\r
251f9b39 4Copyright (c) 2010 - 2021, Intel Corporation. All rights reserved.<BR>\r
87280982 5Portions copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>\r
ad1db975 6Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
f51461c8 7\r
2e351cbe 8SPDX-License-Identifier: BSD-2-Clause-Patent\r
f51461c8
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9\r
10**/\r
11\r
12#include "WinNtInclude.h"\r
13\r
14#ifndef __GNUC__\r
15#include <windows.h>\r
16#include <io.h>\r
17#endif\r
18#include <assert.h>\r
19#include <stdio.h>\r
20#include <stdlib.h>\r
21#include <string.h>\r
22#include <time.h>\r
23#include <ctype.h>\r
24\r
25#include <Common/UefiBaseTypes.h>\r
26#include <IndustryStandard/PeImage.h>\r
27\r
28#include "PeCoffLib.h"\r
29#include "EfiUtilityMsgs.h"\r
30\r
31#include "GenFw.h"\r
32#include "ElfConvert.h"\r
33#include "Elf64Convert.h"\r
34\r
35STATIC\r
36VOID\r
37ScanSections64 (\r
38 VOID\r
39 );\r
40\r
41STATIC\r
42BOOLEAN\r
43WriteSections64 (\r
44 SECTION_FILTER_TYPES FilterType\r
45 );\r
46\r
47STATIC\r
48VOID\r
49WriteRelocations64 (\r
50 VOID\r
51 );\r
52\r
53STATIC\r
54VOID\r
55WriteDebug64 (\r
56 VOID\r
57 );\r
58\r
59STATIC\r
60VOID\r
61SetImageSize64 (\r
62 VOID\r
63 );\r
64\r
65STATIC\r
66VOID\r
67CleanUp64 (\r
68 VOID\r
69 );\r
70\r
71//\r
fb0b35e0 72// Rename ELF32 structures to common names to help when porting to ELF64.\r
f51461c8
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73//\r
74typedef Elf64_Shdr Elf_Shdr;\r
75typedef Elf64_Ehdr Elf_Ehdr;\r
76typedef Elf64_Rel Elf_Rel;\r
77typedef Elf64_Rela Elf_Rela;\r
78typedef Elf64_Sym Elf_Sym;\r
79typedef Elf64_Phdr Elf_Phdr;\r
80typedef Elf64_Dyn Elf_Dyn;\r
81#define ELFCLASS ELFCLASS64\r
82#define ELF_R_TYPE(r) ELF64_R_TYPE(r)\r
83#define ELF_R_SYM(r) ELF64_R_SYM(r)\r
84\r
85//\r
86// Well known ELF structures.\r
87//\r
88STATIC Elf_Ehdr *mEhdr;\r
89STATIC Elf_Shdr *mShdrBase;\r
90STATIC Elf_Phdr *mPhdrBase;\r
91\r
ecbaa856
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92//\r
93// GOT information\r
94//\r
95STATIC Elf_Shdr *mGOTShdr = NULL;\r
96STATIC UINT32 mGOTShindex = 0;\r
97STATIC UINT32 *mGOTCoffEntries = NULL;\r
98STATIC UINT32 mGOTMaxCoffEntries = 0;\r
99STATIC UINT32 mGOTNumCoffEntries = 0;\r
100\r
f51461c8
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101//\r
102// Coff information\r
103//\r
54b1b57a 104STATIC UINT32 mCoffAlignment = 0x20;\r
f51461c8
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105\r
106//\r
107// PE section alignment.\r
108//\r
0192b71c 109STATIC const UINT16 mCoffNbrSections = 4;\r
f51461c8
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110\r
111//\r
112// ELF sections to offset in Coff file.\r
113//\r
114STATIC UINT32 *mCoffSectionsOffset = NULL;\r
115\r
116//\r
117// Offsets in COFF file\r
118//\r
119STATIC UINT32 mNtHdrOffset;\r
120STATIC UINT32 mTextOffset;\r
121STATIC UINT32 mDataOffset;\r
122STATIC UINT32 mHiiRsrcOffset;\r
123STATIC UINT32 mRelocOffset;\r
0192b71c 124STATIC UINT32 mDebugOffset;\r
f51461c8 125\r
ad1db975
AC
126//\r
127// Used for RISC-V relocations.\r
128//\r
129STATIC UINT8 *mRiscVPass1Targ = NULL;\r
130STATIC Elf_Shdr *mRiscVPass1Sym = NULL;\r
131STATIC Elf64_Half mRiscVPass1SymSecIndex = 0;\r
abfff7c4
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132STATIC INT32 mRiscVPass1Offset;\r
133STATIC INT32 mRiscVPass1GotFixup;\r
ad1db975 134\r
f51461c8
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135//\r
136// Initialization Function\r
137//\r
138BOOLEAN\r
139InitializeElf64 (\r
140 UINT8 *FileBuffer,\r
141 ELF_FUNCTION_TABLE *ElfFunctions\r
142 )\r
143{\r
144 //\r
145 // Initialize data pointer and structures.\r
146 //\r
147 VerboseMsg ("Set EHDR");\r
148 mEhdr = (Elf_Ehdr*) FileBuffer;\r
149\r
150 //\r
151 // Check the ELF64 specific header information.\r
152 //\r
153 VerboseMsg ("Check ELF64 Header Information");\r
154 if (mEhdr->e_ident[EI_CLASS] != ELFCLASS64) {\r
155 Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFCLASS64");\r
156 return FALSE;\r
157 }\r
158 if (mEhdr->e_ident[EI_DATA] != ELFDATA2LSB) {\r
159 Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFDATA2LSB");\r
160 return FALSE;\r
161 }\r
162 if ((mEhdr->e_type != ET_EXEC) && (mEhdr->e_type != ET_DYN)) {\r
163 Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");\r
164 return FALSE;\r
165 }\r
ad1db975 166 if (!((mEhdr->e_machine == EM_X86_64) || (mEhdr->e_machine == EM_AARCH64) || (mEhdr->e_machine == EM_RISCV64))) {\r
251f9b39 167 Warning (NULL, 0, 3000, "Unsupported", "ELF e_machine is not Elf64 machine.");\r
f51461c8
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168 }\r
169 if (mEhdr->e_version != EV_CURRENT) {\r
170 Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) mEhdr->e_version, EV_CURRENT);\r
171 return FALSE;\r
172 }\r
173\r
174 //\r
175 // Update section header pointers\r
176 //\r
177 VerboseMsg ("Update Header Pointers");\r
178 mShdrBase = (Elf_Shdr *)((UINT8 *)mEhdr + mEhdr->e_shoff);\r
179 mPhdrBase = (Elf_Phdr *)((UINT8 *)mEhdr + mEhdr->e_phoff);\r
180\r
181 //\r
182 // Create COFF Section offset buffer and zero.\r
183 //\r
184 VerboseMsg ("Create COFF Section Offset Buffer");\r
185 mCoffSectionsOffset = (UINT32 *)malloc(mEhdr->e_shnum * sizeof (UINT32));\r
06b45735
HW
186 if (mCoffSectionsOffset == NULL) {\r
187 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");\r
188 return FALSE;\r
189 }\r
f51461c8
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190 memset(mCoffSectionsOffset, 0, mEhdr->e_shnum * sizeof(UINT32));\r
191\r
192 //\r
193 // Fill in function pointers.\r
194 //\r
195 VerboseMsg ("Fill in Function Pointers");\r
196 ElfFunctions->ScanSections = ScanSections64;\r
197 ElfFunctions->WriteSections = WriteSections64;\r
198 ElfFunctions->WriteRelocations = WriteRelocations64;\r
199 ElfFunctions->WriteDebug = WriteDebug64;\r
200 ElfFunctions->SetImageSize = SetImageSize64;\r
201 ElfFunctions->CleanUp = CleanUp64;\r
202\r
203 return TRUE;\r
204}\r
205\r
206\r
207//\r
208// Header by Index functions\r
209//\r
210STATIC\r
211Elf_Shdr*\r
212GetShdrByIndex (\r
213 UINT32 Num\r
214 )\r
215{\r
17751c5f
ML
216 if (Num >= mEhdr->e_shnum) {\r
217 Error (NULL, 0, 3000, "Invalid", "GetShdrByIndex: Index %u is too high.", Num);\r
218 exit(EXIT_FAILURE);\r
219 }\r
220\r
f51461c8
LG
221 return (Elf_Shdr*)((UINT8*)mShdrBase + Num * mEhdr->e_shentsize);\r
222}\r
223\r
224STATIC\r
225UINT32\r
226CoffAlign (\r
227 UINT32 Offset\r
228 )\r
229{\r
230 return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);\r
231}\r
232\r
4f7d5c67
AB
233STATIC\r
234UINT32\r
235DebugRvaAlign (\r
236 UINT32 Offset\r
237 )\r
238{\r
239 return (Offset + 3) & ~3;\r
240}\r
241\r
f51461c8
LG
242//\r
243// filter functions\r
244//\r
245STATIC\r
246BOOLEAN\r
247IsTextShdr (\r
248 Elf_Shdr *Shdr\r
249 )\r
250{\r
1b380aa6
LG
251 return (BOOLEAN) (((Shdr->sh_flags & (SHF_EXECINSTR | SHF_ALLOC)) == (SHF_EXECINSTR | SHF_ALLOC)) ||\r
252 ((Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == SHF_ALLOC));\r
f51461c8
LG
253}\r
254\r
255STATIC\r
256BOOLEAN\r
257IsHiiRsrcShdr (\r
258 Elf_Shdr *Shdr\r
259 )\r
260{\r
261 Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);\r
262\r
263 return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);\r
264}\r
265\r
266STATIC\r
267BOOLEAN\r
268IsDataShdr (\r
269 Elf_Shdr *Shdr\r
270 )\r
271{\r
272 if (IsHiiRsrcShdr(Shdr)) {\r
273 return FALSE;\r
274 }\r
c6b872c6 275 return (BOOLEAN) (Shdr->sh_flags & (SHF_EXECINSTR | SHF_WRITE | SHF_ALLOC)) == (SHF_ALLOC | SHF_WRITE);\r
f51461c8
LG
276}\r
277\r
621bb723
ML
278STATIC\r
279BOOLEAN\r
280IsStrtabShdr (\r
281 Elf_Shdr *Shdr\r
282 )\r
283{\r
284 Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);\r
285\r
286 return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_STRTAB_SECTION_NAME) == 0);\r
287}\r
288\r
289STATIC\r
290Elf_Shdr *\r
291FindStrtabShdr (\r
292 VOID\r
293 )\r
294{\r
295 UINT32 i;\r
296 for (i = 0; i < mEhdr->e_shnum; i++) {\r
297 Elf_Shdr *shdr = GetShdrByIndex(i);\r
298 if (IsStrtabShdr(shdr)) {\r
299 return shdr;\r
300 }\r
301 }\r
302 return NULL;\r
303}\r
304\r
305STATIC\r
306const UINT8 *\r
307GetSymName (\r
308 Elf_Sym *Sym\r
309 )\r
310{\r
7be7b25d
HW
311 Elf_Shdr *StrtabShdr;\r
312 UINT8 *StrtabContents;\r
313 BOOLEAN foundEnd;\r
314 UINT32 i;\r
315\r
621bb723
ML
316 if (Sym->st_name == 0) {\r
317 return NULL;\r
318 }\r
319\r
7be7b25d 320 StrtabShdr = FindStrtabShdr();\r
621bb723
ML
321 if (StrtabShdr == NULL) {\r
322 return NULL;\r
323 }\r
324\r
325 assert(Sym->st_name < StrtabShdr->sh_size);\r
326\r
7be7b25d 327 StrtabContents = (UINT8*)mEhdr + StrtabShdr->sh_offset;\r
ea3e924a 328\r
7be7b25d 329 foundEnd = FALSE;\r
a754c70c 330 for (i= Sym->st_name; (i < StrtabShdr->sh_size) && !foundEnd; i++) {\r
7be7b25d 331 foundEnd = (BOOLEAN)(StrtabContents[i] == 0);\r
ea3e924a
ML
332 }\r
333 assert(foundEnd);\r
334\r
335 return StrtabContents + Sym->st_name;\r
621bb723
ML
336}\r
337\r
ecbaa856
Z
338//\r
339// Find the ELF section hosting the GOT from an ELF Rva\r
340// of a single GOT entry. Normally, GOT is placed in\r
341// ELF .text section, so assume once we find in which\r
342// section the GOT is, all GOT entries are there, and\r
343// just verify this.\r
344//\r
345STATIC\r
346VOID\r
347FindElfGOTSectionFromGOTEntryElfRva (\r
348 Elf64_Addr GOTEntryElfRva\r
349 )\r
350{\r
351 UINT32 i;\r
352 if (mGOTShdr != NULL) {\r
353 if (GOTEntryElfRva >= mGOTShdr->sh_addr &&\r
354 GOTEntryElfRva < mGOTShdr->sh_addr + mGOTShdr->sh_size) {\r
355 return;\r
356 }\r
357 Error (NULL, 0, 3000, "Unsupported", "FindElfGOTSectionFromGOTEntryElfRva: GOT entries found in multiple sections.");\r
358 exit(EXIT_FAILURE);\r
359 }\r
360 for (i = 0; i < mEhdr->e_shnum; i++) {\r
361 Elf_Shdr *shdr = GetShdrByIndex(i);\r
362 if (GOTEntryElfRva >= shdr->sh_addr &&\r
363 GOTEntryElfRva < shdr->sh_addr + shdr->sh_size) {\r
364 mGOTShdr = shdr;\r
365 mGOTShindex = i;\r
366 return;\r
367 }\r
368 }\r
369 Error (NULL, 0, 3000, "Invalid", "FindElfGOTSectionFromGOTEntryElfRva: ElfRva 0x%016LX for GOT entry not found in any section.", GOTEntryElfRva);\r
370 exit(EXIT_FAILURE);\r
371}\r
372\r
373//\r
374// Stores locations of GOT entries in COFF image.\r
375// Returns TRUE if GOT entry is new.\r
376// Simple implementation as number of GOT\r
377// entries is expected to be low.\r
378//\r
379\r
380STATIC\r
381BOOLEAN\r
382AccumulateCoffGOTEntries (\r
383 UINT32 GOTCoffEntry\r
384 )\r
385{\r
386 UINT32 i;\r
387 if (mGOTCoffEntries != NULL) {\r
388 for (i = 0; i < mGOTNumCoffEntries; i++) {\r
389 if (mGOTCoffEntries[i] == GOTCoffEntry) {\r
390 return FALSE;\r
391 }\r
392 }\r
393 }\r
394 if (mGOTCoffEntries == NULL) {\r
395 mGOTCoffEntries = (UINT32*)malloc(5 * sizeof *mGOTCoffEntries);\r
396 if (mGOTCoffEntries == NULL) {\r
397 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");\r
398 }\r
399 assert (mGOTCoffEntries != NULL);\r
400 mGOTMaxCoffEntries = 5;\r
401 mGOTNumCoffEntries = 0;\r
402 } else if (mGOTNumCoffEntries == mGOTMaxCoffEntries) {\r
403 mGOTCoffEntries = (UINT32*)realloc(mGOTCoffEntries, 2 * mGOTMaxCoffEntries * sizeof *mGOTCoffEntries);\r
404 if (mGOTCoffEntries == NULL) {\r
405 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");\r
406 }\r
407 assert (mGOTCoffEntries != NULL);\r
408 mGOTMaxCoffEntries += mGOTMaxCoffEntries;\r
409 }\r
410 mGOTCoffEntries[mGOTNumCoffEntries++] = GOTCoffEntry;\r
411 return TRUE;\r
412}\r
413\r
414//\r
415// 32-bit Unsigned integer comparator for qsort.\r
416//\r
417STATIC\r
418int\r
419UINT32Comparator (\r
420 const void* lhs,\r
421 const void* rhs\r
422 )\r
423{\r
424 if (*(const UINT32*)lhs < *(const UINT32*)rhs) {\r
425 return -1;\r
426 }\r
427 return *(const UINT32*)lhs > *(const UINT32*)rhs;\r
428}\r
429\r
430//\r
431// Emit accumulated Coff GOT entry relocations into\r
432// Coff image. This function performs its job\r
433// once and then releases the entry list, so\r
434// it can safely be called multiple times.\r
435//\r
436STATIC\r
437VOID\r
438EmitGOTRelocations (\r
439 VOID\r
440 )\r
441{\r
442 UINT32 i;\r
443 if (mGOTCoffEntries == NULL) {\r
444 return;\r
445 }\r
446 //\r
447 // Emit Coff relocations with Rvas ordered.\r
448 //\r
449 qsort(\r
450 mGOTCoffEntries,\r
451 mGOTNumCoffEntries,\r
452 sizeof *mGOTCoffEntries,\r
453 UINT32Comparator);\r
454 for (i = 0; i < mGOTNumCoffEntries; i++) {\r
455 VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X", mGOTCoffEntries[i]);\r
456 CoffAddFixup(\r
457 mGOTCoffEntries[i],\r
458 EFI_IMAGE_REL_BASED_DIR64);\r
459 }\r
460 free(mGOTCoffEntries);\r
461 mGOTCoffEntries = NULL;\r
462 mGOTMaxCoffEntries = 0;\r
463 mGOTNumCoffEntries = 0;\r
464}\r
ad1db975
AC
465//\r
466// RISC-V 64 specific Elf WriteSection function.\r
467//\r
468STATIC\r
469VOID\r
470WriteSectionRiscV64 (\r
471 Elf_Rela *Rel,\r
472 UINT8 *Targ,\r
473 Elf_Shdr *SymShdr,\r
474 Elf_Sym *Sym\r
475 )\r
476{\r
477 UINT32 Value;\r
478 UINT32 Value2;\r
abfff7c4 479 Elf64_Addr GOTEntryRva;\r
ad1db975
AC
480\r
481 switch (ELF_R_TYPE(Rel->r_info)) {\r
482 case R_RISCV_NONE:\r
483 break;\r
484\r
485 case R_RISCV_32:\r
abfff7c4 486 *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;\r
ad1db975
AC
487 break;\r
488\r
489 case R_RISCV_64:\r
abfff7c4 490 *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;\r
ad1db975
AC
491 break;\r
492\r
493 case R_RISCV_HI20:\r
494 mRiscVPass1Targ = Targ;\r
495 mRiscVPass1Sym = SymShdr;\r
496 mRiscVPass1SymSecIndex = Sym->st_shndx;\r
497 break;\r
498\r
499 case R_RISCV_LO12_I:\r
500 if (mRiscVPass1Sym == SymShdr && mRiscVPass1Targ != NULL && mRiscVPass1SymSecIndex == Sym->st_shndx && mRiscVPass1SymSecIndex != 0) {\r
501 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20) << 12);\r
502 Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));\r
503 if (Value2 & (RISCV_IMM_REACH/2)) {\r
504 Value2 |= ~(RISCV_IMM_REACH-1);\r
505 }\r
506 Value += Value2;\r
507 Value = Value - (UINT32)SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];\r
508 Value2 = RISCV_CONST_HIGH_PART (Value);\r
509 *(UINT32 *)mRiscVPass1Targ = (RV_X (Value2, 12, 20) << 12) | \\r
510 (RV_X (*(UINT32 *)mRiscVPass1Targ, 0, 12));\r
511 *(UINT32 *)Targ = (RV_X (Value, 0, 12) << 20) | \\r
512 (RV_X (*(UINT32 *)Targ, 0, 20));\r
513 }\r
514 mRiscVPass1Sym = NULL;\r
515 mRiscVPass1Targ = NULL;\r
516 mRiscVPass1SymSecIndex = 0;\r
517 break;\r
518\r
519 case R_RISCV_LO12_S:\r
520 if (mRiscVPass1Sym == SymShdr && mRiscVPass1Targ != NULL && mRiscVPass1SymSecIndex == Sym->st_shndx && mRiscVPass1SymSecIndex != 0) {\r
521 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20) << 12);\r
522 Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 7, 5) | (RV_X(*(UINT32 *)Targ, 25, 7) << 5));\r
523 if (Value2 & (RISCV_IMM_REACH/2)) {\r
524 Value2 |= ~(RISCV_IMM_REACH-1);\r
525 }\r
526 Value += Value2;\r
527 Value = Value - (UINT32)SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];\r
528 Value2 = RISCV_CONST_HIGH_PART (Value);\r
529 *(UINT32 *)mRiscVPass1Targ = (RV_X (Value2, 12, 20) << 12) | \\r
530 (RV_X (*(UINT32 *)mRiscVPass1Targ, 0, 12));\r
531 Value2 = *(UINT32 *)Targ & 0x01fff07f;\r
532 Value &= RISCV_IMM_REACH - 1;\r
533 *(UINT32 *)Targ = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));\r
534 }\r
535 mRiscVPass1Sym = NULL;\r
536 mRiscVPass1Targ = NULL;\r
537 mRiscVPass1SymSecIndex = 0;\r
538 break;\r
539\r
abfff7c4
S
540 case R_RISCV_GOT_HI20:\r
541 GOTEntryRva = (Sym->st_value - Rel->r_offset);\r
542 mRiscVPass1Offset = RV_X(GOTEntryRva, 0, 12);\r
543 Value = (UINT32)RV_X(GOTEntryRva, 12, 20);\r
544 *(UINT32 *)Targ = (Value << 12) | (RV_X(*(UINT32*)Targ, 0, 12));\r
545\r
546 mRiscVPass1Targ = Targ;\r
547 mRiscVPass1Sym = SymShdr;\r
548 mRiscVPass1SymSecIndex = Sym->st_shndx;\r
549 mRiscVPass1GotFixup = 1;\r
550 break;\r
551\r
ad1db975
AC
552 case R_RISCV_PCREL_HI20:\r
553 mRiscVPass1Targ = Targ;\r
554 mRiscVPass1Sym = SymShdr;\r
555 mRiscVPass1SymSecIndex = Sym->st_shndx;\r
556\r
557 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));\r
558 break;\r
559\r
c32c5911
S
560 case R_RISCV_PCREL_LO12_S:\r
561 if (mRiscVPass1Targ != NULL && mRiscVPass1Sym != NULL && mRiscVPass1SymSecIndex != 0) {\r
562 int i;\r
563 Value2 = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));\r
564\r
565 Value = ((UINT32)(RV_X(*(UINT32 *)Targ, 25, 7)) << 5);\r
566 Value = (Value | (UINT32)(RV_X(*(UINT32 *)Targ, 7, 5)));\r
567\r
568 if(Value & (RISCV_IMM_REACH/2)) {\r
569 Value |= ~(RISCV_IMM_REACH-1);\r
570 }\r
571 Value = Value - (UINT32)mRiscVPass1Sym->sh_addr + mCoffSectionsOffset[mRiscVPass1SymSecIndex];\r
572\r
573 if(-2048 > (INT32)Value) {\r
574 i = (((INT32)Value * -1) / 4096);\r
575 Value2 -= i;\r
576 Value += 4096 * i;\r
577 if(-2048 > (INT32)Value) {\r
578 Value2 -= 1;\r
579 Value += 4096;\r
580 }\r
581 }\r
582 else if( 2047 < (INT32)Value) {\r
583 i = (Value / 4096);\r
584 Value2 += i;\r
585 Value -= 4096 * i;\r
586 if(2047 < (INT32)Value) {\r
587 Value2 += 1;\r
588 Value -= 4096;\r
589 }\r
590 }\r
591\r
592 // Update the IMM of SD instruction\r
593 //\r
594 // |31 25|24 20|19 15|14 12 |11 7|6 0|\r
595 // |-------------------------------------------|-------|\r
596 // |imm[11:5] | rs2 | rs1 | funct3 |imm[4:0] | opcode|\r
597 // ---------------------------------------------------\r
598\r
599 // First Zero out current IMM\r
600 *(UINT32 *)Targ &= ~0xfe000f80;\r
601\r
602 // Update with new IMM\r
603 *(UINT32 *)Targ |= (RV_X(Value, 5, 7) << 25);\r
604 *(UINT32 *)Targ |= (RV_X(Value, 0, 5) << 7);\r
605\r
606 // Update previous instruction\r
607 *(UINT32 *)mRiscVPass1Targ = (RV_X(Value2, 0, 20)<<12) | (RV_X(*(UINT32 *)mRiscVPass1Targ, 0, 12));\r
608 }\r
609 mRiscVPass1Sym = NULL;\r
610 mRiscVPass1Targ = NULL;\r
611 mRiscVPass1SymSecIndex = 0;\r
612 break;\r
613\r
ad1db975
AC
614 case R_RISCV_PCREL_LO12_I:\r
615 if (mRiscVPass1Targ != NULL && mRiscVPass1Sym != NULL && mRiscVPass1SymSecIndex != 0) {\r
616 int i;\r
617 Value2 = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));\r
abfff7c4
S
618\r
619 if(mRiscVPass1GotFixup) {\r
620 Value = (UINT32)(mRiscVPass1Offset);\r
621 } else {\r
622 Value = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));\r
623 if(Value & (RISCV_IMM_REACH/2)) {\r
624 Value |= ~(RISCV_IMM_REACH-1);\r
625 }\r
ad1db975
AC
626 }\r
627 Value = Value - (UINT32)mRiscVPass1Sym->sh_addr + mCoffSectionsOffset[mRiscVPass1SymSecIndex];\r
abfff7c4 628\r
ad1db975
AC
629 if(-2048 > (INT32)Value) {\r
630 i = (((INT32)Value * -1) / 4096);\r
631 Value2 -= i;\r
632 Value += 4096 * i;\r
633 if(-2048 > (INT32)Value) {\r
634 Value2 -= 1;\r
635 Value += 4096;\r
636 }\r
637 }\r
638 else if( 2047 < (INT32)Value) {\r
639 i = (Value / 4096);\r
640 Value2 += i;\r
641 Value -= 4096 * i;\r
642 if(2047 < (INT32)Value) {\r
643 Value2 += 1;\r
644 Value -= 4096;\r
645 }\r
646 }\r
647\r
abfff7c4
S
648 if(mRiscVPass1GotFixup) {\r
649 *(UINT32 *)Targ = (RV_X((UINT32)Value, 0, 12) << 20)\r
650 | (RV_X(*(UINT32*)Targ, 0, 20));\r
651 // Convert LD instruction to ADDI\r
652 //\r
653 // |31 20|19 15|14 12|11 7|6 0|\r
654 // |-----------------------------------------|\r
655 // |imm[11:0] | rs1 | 011 | rd | 0000011 | LD\r
656 // -----------------------------------------\r
657\r
658 // |-----------------------------------------|\r
659 // |imm[11:0] | rs1 | 000 | rd | 0010011 | ADDI\r
660 // -----------------------------------------\r
661\r
662 // To convert, let's first reset bits 12-14 and 0-6 using ~0x707f\r
663 // Then modify the opcode to ADDI (0010011)\r
664 // All other fields will remain same.\r
665\r
666 *(UINT32 *)Targ = ((*(UINT32 *)Targ & ~0x707f) | 0x13);\r
667 } else {\r
668 *(UINT32 *)Targ = (RV_X(Value, 0, 12) << 20) | (RV_X(*(UINT32*)Targ, 0, 20));\r
669 }\r
ad1db975
AC
670 *(UINT32 *)mRiscVPass1Targ = (RV_X(Value2, 0, 20)<<12) | (RV_X(*(UINT32 *)mRiscVPass1Targ, 0, 12));\r
671 }\r
672 mRiscVPass1Sym = NULL;\r
673 mRiscVPass1Targ = NULL;\r
674 mRiscVPass1SymSecIndex = 0;\r
abfff7c4
S
675 mRiscVPass1Offset = 0;\r
676 mRiscVPass1GotFixup = 0;\r
ad1db975
AC
677 break;\r
678\r
679 case R_RISCV_ADD64:\r
680 case R_RISCV_SUB64:\r
681 case R_RISCV_ADD32:\r
682 case R_RISCV_SUB32:\r
683 case R_RISCV_BRANCH:\r
684 case R_RISCV_JAL:\r
685 case R_RISCV_GPREL_I:\r
686 case R_RISCV_GPREL_S:\r
687 case R_RISCV_CALL:\r
abfff7c4 688 case R_RISCV_CALL_PLT:\r
ad1db975
AC
689 case R_RISCV_RVC_BRANCH:\r
690 case R_RISCV_RVC_JUMP:\r
691 case R_RISCV_RELAX:\r
692 case R_RISCV_SUB6:\r
693 case R_RISCV_SET6:\r
694 case R_RISCV_SET8:\r
695 case R_RISCV_SET16:\r
696 case R_RISCV_SET32:\r
697 break;\r
698\r
699 default:\r
700 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
701 }\r
702}\r
ecbaa856 703\r
f51461c8
LG
704//\r
705// Elf functions interface implementation\r
706//\r
707\r
708STATIC\r
709VOID\r
710ScanSections64 (\r
711 VOID\r
712 )\r
713{\r
714 UINT32 i;\r
715 EFI_IMAGE_DOS_HEADER *DosHdr;\r
716 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;\r
717 UINT32 CoffEntry;\r
718 UINT32 SectionCount;\r
234f9ff9 719 BOOLEAN FoundSection;\r
f51461c8
LG
720\r
721 CoffEntry = 0;\r
722 mCoffOffset = 0;\r
f51461c8
LG
723\r
724 //\r
725 // Coff file start with a DOS header.\r
726 //\r
727 mCoffOffset = sizeof(EFI_IMAGE_DOS_HEADER) + 0x40;\r
728 mNtHdrOffset = mCoffOffset;\r
729 switch (mEhdr->e_machine) {\r
730 case EM_X86_64:\r
f51461c8 731 case EM_AARCH64:\r
ad1db975 732 case EM_RISCV64:\r
f51461c8
LG
733 mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);\r
734 break;\r
735 default:\r
ea3e924a 736 VerboseMsg ("%s unknown e_machine type %hu. Assume X64", mInImageName, mEhdr->e_machine);\r
f51461c8
LG
737 mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);\r
738 break;\r
739 }\r
740\r
741 mTableOffset = mCoffOffset;\r
742 mCoffOffset += mCoffNbrSections * sizeof(EFI_IMAGE_SECTION_HEADER);\r
743\r
54b1b57a
AB
744 //\r
745 // Set mCoffAlignment to the maximum alignment of the input sections\r
746 // we care about\r
747 //\r
748 for (i = 0; i < mEhdr->e_shnum; i++) {\r
749 Elf_Shdr *shdr = GetShdrByIndex(i);\r
750 if (shdr->sh_addralign <= mCoffAlignment) {\r
751 continue;\r
752 }\r
753 if (IsTextShdr(shdr) || IsDataShdr(shdr) || IsHiiRsrcShdr(shdr)) {\r
754 mCoffAlignment = (UINT32)shdr->sh_addralign;\r
755 }\r
756 }\r
757\r
3f021800
YF
758 //\r
759 // Check if mCoffAlignment is larger than MAX_COFF_ALIGNMENT\r
760 //\r
761 if (mCoffAlignment > MAX_COFF_ALIGNMENT) {\r
762 Error (NULL, 0, 3000, "Invalid", "Section alignment is larger than MAX_COFF_ALIGNMENT.");\r
763 assert (FALSE);\r
764 }\r
765\r
766\r
02a5421f
AB
767 //\r
768 // Move the PE/COFF header right before the first section. This will help us\r
769 // save space when converting to TE.\r
770 //\r
771 if (mCoffAlignment > mCoffOffset) {\r
772 mNtHdrOffset += mCoffAlignment - mCoffOffset;\r
773 mTableOffset += mCoffAlignment - mCoffOffset;\r
774 mCoffOffset = mCoffAlignment;\r
775 }\r
776\r
f51461c8
LG
777 //\r
778 // First text sections.\r
779 //\r
780 mCoffOffset = CoffAlign(mCoffOffset);\r
234f9ff9
EB
781 mTextOffset = mCoffOffset;\r
782 FoundSection = FALSE;\r
f51461c8
LG
783 SectionCount = 0;\r
784 for (i = 0; i < mEhdr->e_shnum; i++) {\r
785 Elf_Shdr *shdr = GetShdrByIndex(i);\r
786 if (IsTextShdr(shdr)) {\r
787 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {\r
788 // the alignment field is valid\r
789 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
790 // if the section address is aligned we must align PE/COFF\r
791 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
0c960e86
AB
792 } else {\r
793 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
f51461c8
LG
794 }\r
795 }\r
796\r
797 /* Relocate entry. */\r
798 if ((mEhdr->e_entry >= shdr->sh_addr) &&\r
799 (mEhdr->e_entry < shdr->sh_addr + shdr->sh_size)) {\r
800 CoffEntry = (UINT32) (mCoffOffset + mEhdr->e_entry - shdr->sh_addr);\r
801 }\r
802\r
803 //\r
804 // Set mTextOffset with the offset of the first '.text' section\r
805 //\r
234f9ff9 806 if (!FoundSection) {\r
f51461c8 807 mTextOffset = mCoffOffset;\r
234f9ff9 808 FoundSection = TRUE;\r
f51461c8
LG
809 }\r
810\r
811 mCoffSectionsOffset[i] = mCoffOffset;\r
812 mCoffOffset += (UINT32) shdr->sh_size;\r
813 SectionCount ++;\r
814 }\r
815 }\r
816\r
ddb3fdbe 817 if (!FoundSection && mOutImageType != FW_ACPI_IMAGE) {\r
f51461c8
LG
818 Error (NULL, 0, 3000, "Invalid", "Did not find any '.text' section.");\r
819 assert (FALSE);\r
820 }\r
821\r
4f7d5c67 822 mDebugOffset = DebugRvaAlign(mCoffOffset);\r
0c960e86 823 mCoffOffset = CoffAlign(mCoffOffset);\r
f51461c8
LG
824\r
825 if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {\r
fb0b35e0 826 Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName);\r
f51461c8
LG
827 }\r
828\r
829 //\r
830 // Then data sections.\r
831 //\r
832 mDataOffset = mCoffOffset;\r
234f9ff9 833 FoundSection = FALSE;\r
f51461c8
LG
834 SectionCount = 0;\r
835 for (i = 0; i < mEhdr->e_shnum; i++) {\r
836 Elf_Shdr *shdr = GetShdrByIndex(i);\r
837 if (IsDataShdr(shdr)) {\r
838 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {\r
839 // the alignment field is valid\r
840 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
841 // if the section address is aligned we must align PE/COFF\r
842 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
0c960e86
AB
843 } else {\r
844 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
f51461c8
LG
845 }\r
846 }\r
234f9ff9
EB
847\r
848 //\r
849 // Set mDataOffset with the offset of the first '.data' section\r
850 //\r
851 if (!FoundSection) {\r
852 mDataOffset = mCoffOffset;\r
853 FoundSection = TRUE;\r
854 }\r
f51461c8
LG
855 mCoffSectionsOffset[i] = mCoffOffset;\r
856 mCoffOffset += (UINT32) shdr->sh_size;\r
857 SectionCount ++;\r
858 }\r
859 }\r
0192b71c
AB
860\r
861 //\r
862 // Make room for .debug data in .data (or .text if .data is empty) instead of\r
863 // putting it in a section of its own. This is explicitly allowed by the\r
864 // PE/COFF spec, and prevents bloat in the binary when using large values for\r
865 // section alignment.\r
866 //\r
867 if (SectionCount > 0) {\r
4f7d5c67 868 mDebugOffset = DebugRvaAlign(mCoffOffset);\r
0192b71c
AB
869 }\r
870 mCoffOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY) +\r
871 sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) +\r
872 strlen(mInImageName) + 1;\r
873\r
f51461c8 874 mCoffOffset = CoffAlign(mCoffOffset);\r
0192b71c
AB
875 if (SectionCount == 0) {\r
876 mDataOffset = mCoffOffset;\r
877 }\r
f51461c8
LG
878\r
879 if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {\r
fb0b35e0 880 Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 data section. Source level debug might not work correctly.", mInImageName);\r
f51461c8
LG
881 }\r
882\r
883 //\r
884 // The HII resource sections.\r
885 //\r
886 mHiiRsrcOffset = mCoffOffset;\r
887 for (i = 0; i < mEhdr->e_shnum; i++) {\r
888 Elf_Shdr *shdr = GetShdrByIndex(i);\r
889 if (IsHiiRsrcShdr(shdr)) {\r
890 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {\r
891 // the alignment field is valid\r
892 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
893 // if the section address is aligned we must align PE/COFF\r
894 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
0c960e86
AB
895 } else {\r
896 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
f51461c8
LG
897 }\r
898 }\r
899 if (shdr->sh_size != 0) {\r
234f9ff9 900 mHiiRsrcOffset = mCoffOffset;\r
f51461c8
LG
901 mCoffSectionsOffset[i] = mCoffOffset;\r
902 mCoffOffset += (UINT32) shdr->sh_size;\r
903 mCoffOffset = CoffAlign(mCoffOffset);\r
904 SetHiiResourceHeader ((UINT8*) mEhdr + shdr->sh_offset, mHiiRsrcOffset);\r
905 }\r
906 break;\r
907 }\r
908 }\r
909\r
910 mRelocOffset = mCoffOffset;\r
911\r
912 //\r
913 // Allocate base Coff file. Will be expanded later for relocations.\r
914 //\r
915 mCoffFile = (UINT8 *)malloc(mCoffOffset);\r
06b45735
HW
916 if (mCoffFile == NULL) {\r
917 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");\r
918 }\r
919 assert (mCoffFile != NULL);\r
f51461c8
LG
920 memset(mCoffFile, 0, mCoffOffset);\r
921\r
922 //\r
923 // Fill headers.\r
924 //\r
925 DosHdr = (EFI_IMAGE_DOS_HEADER *)mCoffFile;\r
926 DosHdr->e_magic = EFI_IMAGE_DOS_SIGNATURE;\r
927 DosHdr->e_lfanew = mNtHdrOffset;\r
928\r
929 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(mCoffFile + mNtHdrOffset);\r
930\r
931 NtHdr->Pe32Plus.Signature = EFI_IMAGE_NT_SIGNATURE;\r
932\r
933 switch (mEhdr->e_machine) {\r
934 case EM_X86_64:\r
935 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;\r
936 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
937 break;\r
f51461c8
LG
938 case EM_AARCH64:\r
939 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_AARCH64;\r
940 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
941 break;\r
ad1db975
AC
942 case EM_RISCV64:\r
943 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_RISCV64;\r
944 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
945 break;\r
946\r
f51461c8
LG
947 default:\r
948 VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);\r
949 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;\r
950 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
951 }\r
952\r
953 NtHdr->Pe32Plus.FileHeader.NumberOfSections = mCoffNbrSections;\r
954 NtHdr->Pe32Plus.FileHeader.TimeDateStamp = (UINT32) time(NULL);\r
955 mImageTimeStamp = NtHdr->Pe32Plus.FileHeader.TimeDateStamp;\r
956 NtHdr->Pe32Plus.FileHeader.PointerToSymbolTable = 0;\r
957 NtHdr->Pe32Plus.FileHeader.NumberOfSymbols = 0;\r
958 NtHdr->Pe32Plus.FileHeader.SizeOfOptionalHeader = sizeof(NtHdr->Pe32Plus.OptionalHeader);\r
959 NtHdr->Pe32Plus.FileHeader.Characteristics = EFI_IMAGE_FILE_EXECUTABLE_IMAGE\r
960 | EFI_IMAGE_FILE_LINE_NUMS_STRIPPED\r
961 | EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED\r
962 | EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE;\r
963\r
964 NtHdr->Pe32Plus.OptionalHeader.SizeOfCode = mDataOffset - mTextOffset;\r
965 NtHdr->Pe32Plus.OptionalHeader.SizeOfInitializedData = mRelocOffset - mDataOffset;\r
966 NtHdr->Pe32Plus.OptionalHeader.SizeOfUninitializedData = 0;\r
967 NtHdr->Pe32Plus.OptionalHeader.AddressOfEntryPoint = CoffEntry;\r
968\r
969 NtHdr->Pe32Plus.OptionalHeader.BaseOfCode = mTextOffset;\r
970\r
971 NtHdr->Pe32Plus.OptionalHeader.ImageBase = 0;\r
972 NtHdr->Pe32Plus.OptionalHeader.SectionAlignment = mCoffAlignment;\r
973 NtHdr->Pe32Plus.OptionalHeader.FileAlignment = mCoffAlignment;\r
974 NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = 0;\r
975\r
976 NtHdr->Pe32Plus.OptionalHeader.SizeOfHeaders = mTextOffset;\r
977 NtHdr->Pe32Plus.OptionalHeader.NumberOfRvaAndSizes = EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES;\r
978\r
979 //\r
980 // Section headers.\r
981 //\r
982 if ((mDataOffset - mTextOffset) > 0) {\r
983 CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,\r
984 EFI_IMAGE_SCN_CNT_CODE\r
985 | EFI_IMAGE_SCN_MEM_EXECUTE\r
986 | EFI_IMAGE_SCN_MEM_READ);\r
987 } else {\r
988 // Don't make a section of size 0.\r
989 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;\r
990 }\r
991\r
992 if ((mHiiRsrcOffset - mDataOffset) > 0) {\r
993 CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,\r
994 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA\r
995 | EFI_IMAGE_SCN_MEM_WRITE\r
996 | EFI_IMAGE_SCN_MEM_READ);\r
997 } else {\r
998 // Don't make a section of size 0.\r
999 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;\r
1000 }\r
1001\r
1002 if ((mRelocOffset - mHiiRsrcOffset) > 0) {\r
1003 CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,\r
1004 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA\r
1005 | EFI_IMAGE_SCN_MEM_READ);\r
1006\r
1007 NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = mRelocOffset - mHiiRsrcOffset;\r
1008 NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = mHiiRsrcOffset;\r
1009 } else {\r
1010 // Don't make a section of size 0.\r
1011 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;\r
1012 }\r
1013\r
1014}\r
1015\r
1016STATIC\r
1017BOOLEAN\r
1018WriteSections64 (\r
1019 SECTION_FILTER_TYPES FilterType\r
1020 )\r
1021{\r
1022 UINT32 Idx;\r
1023 Elf_Shdr *SecShdr;\r
1024 UINT32 SecOffset;\r
1025 BOOLEAN (*Filter)(Elf_Shdr *);\r
ecbaa856 1026 Elf64_Addr GOTEntryRva;\r
f51461c8
LG
1027\r
1028 //\r
1029 // Initialize filter pointer\r
1030 //\r
1031 switch (FilterType) {\r
1032 case SECTION_TEXT:\r
1033 Filter = IsTextShdr;\r
1034 break;\r
1035 case SECTION_HII:\r
1036 Filter = IsHiiRsrcShdr;\r
1037 break;\r
1038 case SECTION_DATA:\r
1039 Filter = IsDataShdr;\r
1040 break;\r
1041 default:\r
1042 return FALSE;\r
1043 }\r
1044\r
1045 //\r
1046 // First: copy sections.\r
1047 //\r
1048 for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {\r
1049 Elf_Shdr *Shdr = GetShdrByIndex(Idx);\r
1050 if ((*Filter)(Shdr)) {\r
1051 switch (Shdr->sh_type) {\r
1052 case SHT_PROGBITS:\r
1053 /* Copy. */\r
d78675d1
YF
1054 if (Shdr->sh_offset + Shdr->sh_size > mFileBufferSize) {\r
1055 return FALSE;\r
1056 }\r
f51461c8
LG
1057 memcpy(mCoffFile + mCoffSectionsOffset[Idx],\r
1058 (UINT8*)mEhdr + Shdr->sh_offset,\r
1059 (size_t) Shdr->sh_size);\r
1060 break;\r
1061\r
1062 case SHT_NOBITS:\r
1063 memset(mCoffFile + mCoffSectionsOffset[Idx], 0, (size_t) Shdr->sh_size);\r
1064 break;\r
1065\r
1066 default:\r
1067 //\r
fb0b35e0 1068 // Ignore for unknown section type.\r
f51461c8 1069 //\r
1794b98f 1070 VerboseMsg ("%s unknown section type %x. We ignore this unknown section type.", mInImageName, (unsigned)Shdr->sh_type);\r
f51461c8
LG
1071 break;\r
1072 }\r
1073 }\r
1074 }\r
1075\r
1076 //\r
1077 // Second: apply relocations.\r
1078 //\r
1079 VerboseMsg ("Applying Relocations...");\r
1080 for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {\r
1081 //\r
1082 // Determine if this is a relocation section.\r
1083 //\r
1084 Elf_Shdr *RelShdr = GetShdrByIndex(Idx);\r
1085 if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {\r
1086 continue;\r
1087 }\r
1088\r
4962fcfa
AB
1089 //\r
1090 // If this is a ET_DYN (PIE) executable, we will encounter a dynamic SHT_RELA\r
1091 // section that applies to the entire binary, and which will have its section\r
1092 // index set to #0 (which is a NULL section with the SHF_ALLOC bit cleared).\r
1093 //\r
ecbaa856 1094 // In the absence of GOT based relocations,\r
4962fcfa
AB
1095 // this RELA section will contain redundant R_xxx_RELATIVE relocations, one\r
1096 // for every R_xxx_xx64 relocation appearing in the per-section RELA sections.\r
1097 // (i.e., .rela.text and .rela.data)\r
1098 //\r
1099 if (RelShdr->sh_info == 0) {\r
1100 continue;\r
1101 }\r
1102\r
f51461c8
LG
1103 //\r
1104 // Relocation section found. Now extract section information that the relocations\r
1105 // apply to in the ELF data and the new COFF data.\r
1106 //\r
1107 SecShdr = GetShdrByIndex(RelShdr->sh_info);\r
1108 SecOffset = mCoffSectionsOffset[RelShdr->sh_info];\r
1109\r
1110 //\r
1111 // Only process relocations for the current filter type.\r
1112 //\r
1113 if (RelShdr->sh_type == SHT_RELA && (*Filter)(SecShdr)) {\r
1114 UINT64 RelIdx;\r
1115\r
1116 //\r
1117 // Determine the symbol table referenced by the relocation data.\r
1118 //\r
1119 Elf_Shdr *SymtabShdr = GetShdrByIndex(RelShdr->sh_link);\r
1120 UINT8 *Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;\r
1121\r
1122 //\r
1123 // Process all relocation entries for this section.\r
1124 //\r
1125 for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += (UINT32) RelShdr->sh_entsize) {\r
1126\r
1127 //\r
1128 // Set pointer to relocation entry\r
1129 //\r
1130 Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);\r
1131\r
1132 //\r
1133 // Set pointer to symbol table entry associated with the relocation entry.\r
1134 //\r
1135 Elf_Sym *Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);\r
1136\r
1137 Elf_Shdr *SymShdr;\r
1138 UINT8 *Targ;\r
1139\r
1140 //\r
1141 // Check section header index found in symbol table and get the section\r
1142 // header location.\r
1143 //\r
1144 if (Sym->st_shndx == SHN_UNDEF\r
621bb723
ML
1145 || Sym->st_shndx >= mEhdr->e_shnum) {\r
1146 const UINT8 *SymName = GetSymName(Sym);\r
1147 if (SymName == NULL) {\r
1148 SymName = (const UINT8 *)"<unknown>";\r
1149 }\r
1150\r
ad1db975
AC
1151 //\r
1152 // Skip error on EM_RISCV64 becasue no symble name is built\r
1153 // from RISC-V toolchain.\r
1154 //\r
1155 if (mEhdr->e_machine != EM_RISCV64) {\r
1156 Error (NULL, 0, 3000, "Invalid",\r
1157 "%s: Bad definition for symbol '%s'@%#llx or unsupported symbol type. "\r
1158 "For example, absolute and undefined symbols are not supported.",\r
1159 mInImageName, SymName, Sym->st_value);\r
621bb723 1160\r
ad1db975
AC
1161 exit(EXIT_FAILURE);\r
1162 }\r
c6b872c6 1163 continue;\r
f51461c8
LG
1164 }\r
1165 SymShdr = GetShdrByIndex(Sym->st_shndx);\r
1166\r
1167 //\r
1168 // Convert the relocation data to a pointer into the coff file.\r
1169 //\r
1170 // Note:\r
1171 // r_offset is the virtual address of the storage unit to be relocated.\r
1172 // sh_addr is the virtual address for the base of the section.\r
1173 //\r
1174 // r_offset in a memory address.\r
1175 // Convert it to a pointer in the coff file.\r
1176 //\r
1177 Targ = mCoffFile + SecOffset + (Rel->r_offset - SecShdr->sh_addr);\r
1178\r
1179 //\r
1180 // Determine how to handle each relocation type based on the machine type.\r
1181 //\r
1182 if (mEhdr->e_machine == EM_X86_64) {\r
1183 switch (ELF_R_TYPE(Rel->r_info)) {\r
1184 case R_X86_64_NONE:\r
1185 break;\r
1186 case R_X86_64_64:\r
1187 //\r
1188 // Absolute relocation.\r
1189 //\r
1190 VerboseMsg ("R_X86_64_64");\r
f7496d71
LG
1191 VerboseMsg ("Offset: 0x%08X, Addend: 0x%016LX",\r
1192 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),\r
f51461c8
LG
1193 *(UINT64 *)Targ);\r
1194 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];\r
1195 VerboseMsg ("Relocation: 0x%016LX", *(UINT64*)Targ);\r
1196 break;\r
1197 case R_X86_64_32:\r
1198 VerboseMsg ("R_X86_64_32");\r
f7496d71
LG
1199 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",\r
1200 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),\r
f51461c8
LG
1201 *(UINT32 *)Targ);\r
1202 *(UINT32 *)Targ = (UINT32)((UINT64)(*(UINT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);\r
1203 VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);\r
1204 break;\r
1205 case R_X86_64_32S:\r
1206 VerboseMsg ("R_X86_64_32S");\r
f7496d71
LG
1207 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",\r
1208 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),\r
f51461c8
LG
1209 *(UINT32 *)Targ);\r
1210 *(INT32 *)Targ = (INT32)((INT64)(*(INT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);\r
1211 VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);\r
1212 break;\r
c9f29755
AB
1213\r
1214 case R_X86_64_PLT32:\r
1215 //\r
1216 // Treat R_X86_64_PLT32 relocations as R_X86_64_PC32: this is\r
1217 // possible since we know all code symbol references resolve to\r
1218 // definitions in the same module (UEFI has no shared libraries),\r
1219 // and so there is never a reason to jump via a PLT entry,\r
1220 // allowing us to resolve the reference using the symbol directly.\r
1221 //\r
1222 VerboseMsg ("Treating R_X86_64_PLT32 as R_X86_64_PC32 ...");\r
1223 /* fall through */\r
f51461c8
LG
1224 case R_X86_64_PC32:\r
1225 //\r
1226 // Relative relocation: Symbol - Ip + Addend\r
1227 //\r
1228 VerboseMsg ("R_X86_64_PC32");\r
f7496d71
LG
1229 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",\r
1230 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),\r
f51461c8
LG
1231 *(UINT32 *)Targ);\r
1232 *(UINT32 *)Targ = (UINT32) (*(UINT32 *)Targ\r
1233 + (mCoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr)\r
1234 - (SecOffset - SecShdr->sh_addr));\r
1235 VerboseMsg ("Relocation: 0x%08X", *(UINT32 *)Targ);\r
1236 break;\r
ecbaa856
Z
1237 case R_X86_64_GOTPCREL:\r
1238 case R_X86_64_GOTPCRELX:\r
1239 case R_X86_64_REX_GOTPCRELX:\r
1240 VerboseMsg ("R_X86_64_GOTPCREL family");\r
1241 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",\r
1242 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),\r
1243 *(UINT32 *)Targ);\r
1244 GOTEntryRva = Rel->r_offset - Rel->r_addend + *(INT32 *)Targ;\r
1245 FindElfGOTSectionFromGOTEntryElfRva(GOTEntryRva);\r
1246 *(UINT32 *)Targ = (UINT32) (*(UINT32 *)Targ\r
1247 + (mCoffSectionsOffset[mGOTShindex] - mGOTShdr->sh_addr)\r
1248 - (SecOffset - SecShdr->sh_addr));\r
1249 VerboseMsg ("Relocation: 0x%08X", *(UINT32 *)Targ);\r
1250 GOTEntryRva += (mCoffSectionsOffset[mGOTShindex] - mGOTShdr->sh_addr); // ELF Rva -> COFF Rva\r
1251 if (AccumulateCoffGOTEntries((UINT32)GOTEntryRva)) {\r
1252 //\r
1253 // Relocate GOT entry if it's the first time we run into it\r
1254 //\r
1255 Targ = mCoffFile + GOTEntryRva;\r
1256 //\r
1257 // Limitation: The following three statements assume memory\r
1258 // at *Targ is valid because the section containing the GOT\r
1259 // has already been copied from the ELF image to the Coff image.\r
1260 // This pre-condition presently holds because the GOT is placed\r
1261 // in section .text, and the ELF text sections are all copied\r
1262 // prior to reaching this point.\r
1263 // If the pre-condition is violated in the future, this fixup\r
1264 // either needs to be deferred after the GOT section is copied\r
1265 // to the Coff image, or the fixup should be performed on the\r
1266 // source Elf image instead of the destination Coff image.\r
1267 //\r
1268 VerboseMsg ("Offset: 0x%08X, Addend: 0x%016LX",\r
1269 (UINT32)GOTEntryRva,\r
1270 *(UINT64 *)Targ);\r
1271 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];\r
1272 VerboseMsg ("Relocation: 0x%016LX", *(UINT64*)Targ);\r
1273 }\r
1274 break;\r
f51461c8
LG
1275 default:\r
1276 Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
1277 }\r
1278 } else if (mEhdr->e_machine == EM_AARCH64) {\r
1279\r
f51461c8 1280 switch (ELF_R_TYPE(Rel->r_info)) {\r
d2687f23
AB
1281 INT64 Offset;\r
1282\r
1283 case R_AARCH64_LD64_GOT_LO12_NC:\r
1284 //\r
1285 // Convert into an ADD instruction - see R_AARCH64_ADR_GOT_PAGE below.\r
1286 //\r
1287 *(UINT32 *)Targ &= 0x3ff;\r
1288 *(UINT32 *)Targ |= 0x91000000 | ((Sym->st_value & 0xfff) << 10);\r
1289 break;\r
1290\r
1291 case R_AARCH64_ADR_GOT_PAGE:\r
1292 //\r
1293 // This relocation points to the GOT entry that contains the absolute\r
1294 // address of the symbol we are referring to. Since EDK2 only uses\r
1295 // fully linked binaries, we can avoid the indirection, and simply\r
1296 // refer to the symbol directly. This implies having to patch the\r
1297 // subsequent LDR instruction (covered by a R_AARCH64_LD64_GOT_LO12_NC\r
1298 // relocation) into an ADD instruction - this is handled above.\r
1299 //\r
1300 Offset = (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12;\r
1301\r
1302 *(UINT32 *)Targ &= 0x9000001f;\r
1303 *(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29);\r
1304\r
1305 /* fall through */\r
f51461c8 1306\r
24d610e6 1307 case R_AARCH64_ADR_PREL_PG_HI21:\r
f55c76b3
AB
1308 //\r
1309 // In order to handle Cortex-A53 erratum #843419, the LD linker may\r
1310 // convert ADRP instructions into ADR instructions, but without\r
1311 // updating the static relocation type, and so we may end up here\r
1312 // while the instruction in question is actually ADR. So let's\r
1313 // just disregard it: the section offset check we apply below to\r
1314 // ADR instructions will trigger for its R_AARCH64_xxx_ABS_LO12_NC\r
1315 // companion instruction as well, so it is safe to omit it here.\r
1316 //\r
1317 if ((*(UINT32 *)Targ & BIT31) == 0) {\r
1318 break;\r
1319 }\r
1320\r
24d610e6
AB
1321 //\r
1322 // AArch64 PG_H21 relocations are typically paired with ABS_LO12\r
1323 // relocations, where a PC-relative reference with +/- 4 GB range is\r
1324 // split into a relative high part and an absolute low part. Since\r
1325 // the absolute low part represents the offset into a 4 KB page, we\r
026a82ab
AB
1326 // either have to convert the ADRP into an ADR instruction, or we\r
1327 // need to use a section alignment of at least 4 KB, so that the\r
1328 // binary appears at a correct offset at runtime. In any case, we\r
24d610e6
AB
1329 // have to make sure that the 4 KB relative offsets of both the\r
1330 // section containing the reference as well as the section to which\r
1331 // it refers have not been changed during PE/COFF conversion (i.e.,\r
1332 // in ScanSections64() above).\r
1333 //\r
026a82ab
AB
1334 if (mCoffAlignment < 0x1000) {\r
1335 //\r
1336 // Attempt to convert the ADRP into an ADR instruction.\r
1337 // This is only possible if the symbol is within +/- 1 MB.\r
1338 //\r
026a82ab
AB
1339\r
1340 // Decode the ADRP instruction\r
1341 Offset = (INT32)((*(UINT32 *)Targ & 0xffffe0) << 8);\r
1342 Offset = (Offset << (6 - 5)) | ((*(UINT32 *)Targ & 0x60000000) >> (29 - 12));\r
1343\r
1344 //\r
1345 // ADRP offset is relative to the previous page boundary,\r
1346 // whereas ADR offset is relative to the instruction itself.\r
1347 // So fix up the offset so it points to the page containing\r
1348 // the symbol.\r
1349 //\r
1350 Offset -= (UINTN)(Targ - mCoffFile) & 0xfff;\r
1351\r
1352 if (Offset < -0x100000 || Offset > 0xfffff) {\r
1353 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s due to its size (> 1 MB), this module requires 4 KB section alignment.",\r
1354 mInImageName);\r
1355 break;\r
1356 }\r
1357\r
1358 // Re-encode the offset as an ADR instruction\r
1359 *(UINT32 *)Targ &= 0x1000001f;\r
1360 *(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29);\r
1361 }\r
1362 /* fall through */\r
1363\r
1364 case R_AARCH64_ADD_ABS_LO12_NC:\r
1365 case R_AARCH64_LDST8_ABS_LO12_NC:\r
1366 case R_AARCH64_LDST16_ABS_LO12_NC:\r
1367 case R_AARCH64_LDST32_ABS_LO12_NC:\r
1368 case R_AARCH64_LDST64_ABS_LO12_NC:\r
1369 case R_AARCH64_LDST128_ABS_LO12_NC:\r
24d610e6 1370 if (((SecShdr->sh_addr ^ SecOffset) & 0xfff) != 0 ||\r
026a82ab
AB
1371 ((SymShdr->sh_addr ^ mCoffSectionsOffset[Sym->st_shndx]) & 0xfff) != 0) {\r
1372 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s AARCH64 small code model requires identical ELF and PE/COFF section offsets modulo 4 KB.",\r
24d610e6
AB
1373 mInImageName);\r
1374 break;\r
87280982 1375 }\r
24d610e6 1376 /* fall through */\r
87280982 1377\r
24d610e6 1378 case R_AARCH64_ADR_PREL_LO21:\r
87280982 1379 case R_AARCH64_CONDBR19:\r
f51461c8 1380 case R_AARCH64_LD_PREL_LO19:\r
f51461c8 1381 case R_AARCH64_CALL26:\r
f51461c8 1382 case R_AARCH64_JUMP26:\r
0b6249f5
AB
1383 case R_AARCH64_PREL64:\r
1384 case R_AARCH64_PREL32:\r
1385 case R_AARCH64_PREL16:\r
24d610e6
AB
1386 //\r
1387 // The GCC toolchains (i.e., binutils) may corrupt section relative\r
1388 // relocations when emitting relocation sections into fully linked\r
1389 // binaries. More specifically, they tend to fail to take into\r
1390 // account the fact that a '.rodata + XXX' relocation needs to have\r
1391 // its addend recalculated once .rodata is merged into the .text\r
1392 // section, and the relocation emitted into the .rela.text section.\r
1393 //\r
1394 // We cannot really recover from this loss of information, so the\r
1395 // only workaround is to prevent having to recalculate any relative\r
1396 // relocations at all, by using a linker script that ensures that\r
1397 // the offset between the Place and the Symbol is the same in both\r
1398 // the ELF and the PE/COFF versions of the binary.\r
1399 //\r
1400 if ((SymShdr->sh_addr - SecShdr->sh_addr) !=\r
1401 (mCoffSectionsOffset[Sym->st_shndx] - SecOffset)) {\r
1402 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s AARCH64 relative relocations require identical ELF and PE/COFF section offsets",\r
1403 mInImageName);\r
f51461c8
LG
1404 }\r
1405 break;\r
1406\r
f51461c8
LG
1407 // Absolute relocations.\r
1408 case R_AARCH64_ABS64:\r
1409 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];\r
1410 break;\r
1411\r
1412 default:\r
1413 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
1414 }\r
ad1db975
AC
1415 } else if (mEhdr->e_machine == EM_RISCV64) {\r
1416 //\r
1417 // Write section for RISC-V 64 architecture.\r
1418 //\r
1419 WriteSectionRiscV64 (Rel, Targ, SymShdr, Sym);\r
f51461c8
LG
1420 } else {\r
1421 Error (NULL, 0, 3000, "Invalid", "Not a supported machine type");\r
1422 }\r
1423 }\r
1424 }\r
1425 }\r
1426\r
1427 return TRUE;\r
1428}\r
1429\r
1430STATIC\r
1431VOID\r
1432WriteRelocations64 (\r
1433 VOID\r
1434 )\r
1435{\r
1436 UINT32 Index;\r
1437 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;\r
1438 EFI_IMAGE_DATA_DIRECTORY *Dir;\r
ad1db975 1439 UINT32 RiscVRelType;\r
f51461c8
LG
1440\r
1441 for (Index = 0; Index < mEhdr->e_shnum; Index++) {\r
1442 Elf_Shdr *RelShdr = GetShdrByIndex(Index);\r
1443 if ((RelShdr->sh_type == SHT_REL) || (RelShdr->sh_type == SHT_RELA)) {\r
1444 Elf_Shdr *SecShdr = GetShdrByIndex (RelShdr->sh_info);\r
1445 if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {\r
1446 UINT64 RelIdx;\r
1447\r
1448 for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {\r
1449 Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);\r
1450\r
1451 if (mEhdr->e_machine == EM_X86_64) {\r
1452 switch (ELF_R_TYPE(Rel->r_info)) {\r
1453 case R_X86_64_NONE:\r
1454 case R_X86_64_PC32:\r
c9f29755 1455 case R_X86_64_PLT32:\r
ecbaa856
Z
1456 case R_X86_64_GOTPCREL:\r
1457 case R_X86_64_GOTPCRELX:\r
1458 case R_X86_64_REX_GOTPCRELX:\r
f51461c8
LG
1459 break;\r
1460 case R_X86_64_64:\r
f7496d71 1461 VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X",\r
f51461c8
LG
1462 mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));\r
1463 CoffAddFixup(\r
1464 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1465 + (Rel->r_offset - SecShdr->sh_addr)),\r
1466 EFI_IMAGE_REL_BASED_DIR64);\r
1467 break;\r
c6a14de3
Z
1468 //\r
1469 // R_X86_64_32 and R_X86_64_32S are ELF64 relocations emitted when using\r
1470 // the SYSV X64 ABI small non-position-independent code model.\r
1471 // R_X86_64_32 is used for unsigned 32-bit immediates with a 32-bit operand\r
1472 // size. The value is either not extended, or zero-extended to 64 bits.\r
1473 // R_X86_64_32S is used for either signed 32-bit non-rip-relative displacements\r
1474 // or signed 32-bit immediates with a 64-bit operand size. The value is\r
1475 // sign-extended to 64 bits.\r
1476 // EFI_IMAGE_REL_BASED_HIGHLOW is a PE relocation that uses 32-bit arithmetic\r
1477 // for rebasing an image.\r
1478 // EFI PE binaries declare themselves EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE and\r
1479 // may load above 2GB. If an EFI PE binary with a converted R_X86_64_32S\r
1480 // relocation is loaded above 2GB, the value will get sign-extended to the\r
1481 // negative part of the 64-bit address space. The negative part of the 64-bit\r
1482 // address space is unmapped, so accessing such an address page-faults.\r
1483 // In order to support R_X86_64_32S, it is necessary to unset\r
1484 // EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE, and the EFI PE loader must implement\r
1485 // this flag and abstain from loading such a PE binary above 2GB.\r
1486 // Since this feature is not supported, support for R_X86_64_32S (and hence\r
1487 // the small non-position-independent code model) is disabled.\r
1488 //\r
1489 // case R_X86_64_32S:\r
f51461c8 1490 case R_X86_64_32:\r
f7496d71 1491 VerboseMsg ("EFI_IMAGE_REL_BASED_HIGHLOW Offset: 0x%08X",\r
f51461c8
LG
1492 mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));\r
1493 CoffAddFixup(\r
1494 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1495 + (Rel->r_offset - SecShdr->sh_addr)),\r
1496 EFI_IMAGE_REL_BASED_HIGHLOW);\r
1497 break;\r
1498 default:\r
1499 Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
1500 }\r
1501 } else if (mEhdr->e_machine == EM_AARCH64) {\r
24d610e6 1502\r
f51461c8 1503 switch (ELF_R_TYPE(Rel->r_info)) {\r
87280982 1504 case R_AARCH64_ADR_PREL_LO21:\r
87280982 1505 case R_AARCH64_CONDBR19:\r
f51461c8 1506 case R_AARCH64_LD_PREL_LO19:\r
f51461c8 1507 case R_AARCH64_CALL26:\r
f51461c8 1508 case R_AARCH64_JUMP26:\r
0b6249f5
AB
1509 case R_AARCH64_PREL64:\r
1510 case R_AARCH64_PREL32:\r
1511 case R_AARCH64_PREL16:\r
f51461c8 1512 case R_AARCH64_ADR_PREL_PG_HI21:\r
f51461c8 1513 case R_AARCH64_ADD_ABS_LO12_NC:\r
24d610e6
AB
1514 case R_AARCH64_LDST8_ABS_LO12_NC:\r
1515 case R_AARCH64_LDST16_ABS_LO12_NC:\r
1516 case R_AARCH64_LDST32_ABS_LO12_NC:\r
1517 case R_AARCH64_LDST64_ABS_LO12_NC:\r
1518 case R_AARCH64_LDST128_ABS_LO12_NC:\r
d2687f23
AB
1519 case R_AARCH64_ADR_GOT_PAGE:\r
1520 case R_AARCH64_LD64_GOT_LO12_NC:\r
0b6249f5
AB
1521 //\r
1522 // No fixups are required for relative relocations, provided that\r
1523 // the relative offsets between sections have been preserved in\r
1524 // the ELF to PE/COFF conversion. We have already asserted that\r
1525 // this is the case in WriteSections64 ().\r
1526 //\r
f51461c8
LG
1527 break;\r
1528\r
1529 case R_AARCH64_ABS64:\r
1530 CoffAddFixup(\r
1531 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1532 + (Rel->r_offset - SecShdr->sh_addr)),\r
1533 EFI_IMAGE_REL_BASED_DIR64);\r
1534 break;\r
1535\r
1536 case R_AARCH64_ABS32:\r
1537 CoffAddFixup(\r
1538 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1539 + (Rel->r_offset - SecShdr->sh_addr)),\r
1540 EFI_IMAGE_REL_BASED_HIGHLOW);\r
1541 break;\r
1542\r
1543 default:\r
1544 Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
1545 }\r
ad1db975
AC
1546 } else if (mEhdr->e_machine == EM_RISCV64) {\r
1547 RiscVRelType = ELF_R_TYPE(Rel->r_info);\r
1548 switch (RiscVRelType) {\r
1549 case R_RISCV_NONE:\r
1550 break;\r
1551\r
1552 case R_RISCV_32:\r
1553 CoffAddFixup(\r
1554 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1555 + (Rel->r_offset - SecShdr->sh_addr)),\r
1556 EFI_IMAGE_REL_BASED_HIGHLOW);\r
1557 break;\r
1558\r
1559 case R_RISCV_64:\r
1560 CoffAddFixup(\r
1561 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1562 + (Rel->r_offset - SecShdr->sh_addr)),\r
1563 EFI_IMAGE_REL_BASED_DIR64);\r
1564 break;\r
1565\r
1566 case R_RISCV_HI20:\r
1567 CoffAddFixup(\r
1568 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1569 + (Rel->r_offset - SecShdr->sh_addr)),\r
1570 EFI_IMAGE_REL_BASED_RISCV_HI20);\r
1571 break;\r
1572\r
1573 case R_RISCV_LO12_I:\r
1574 CoffAddFixup(\r
1575 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1576 + (Rel->r_offset - SecShdr->sh_addr)),\r
1577 EFI_IMAGE_REL_BASED_RISCV_LOW12I);\r
1578 break;\r
1579\r
1580 case R_RISCV_LO12_S:\r
1581 CoffAddFixup(\r
1582 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1583 + (Rel->r_offset - SecShdr->sh_addr)),\r
1584 EFI_IMAGE_REL_BASED_RISCV_LOW12S);\r
1585 break;\r
1586\r
1587 case R_RISCV_ADD64:\r
1588 CoffAddFixup(\r
1589 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1590 + (Rel->r_offset - SecShdr->sh_addr)),\r
1591 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1592 break;\r
1593\r
1594 case R_RISCV_SUB64:\r
1595 CoffAddFixup(\r
1596 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1597 + (Rel->r_offset - SecShdr->sh_addr)),\r
1598 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1599 break;\r
1600\r
1601 case R_RISCV_ADD32:\r
1602 CoffAddFixup(\r
1603 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1604 + (Rel->r_offset - SecShdr->sh_addr)),\r
1605 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1606 break;\r
1607\r
1608 case R_RISCV_SUB32:\r
1609 CoffAddFixup(\r
1610 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1611 + (Rel->r_offset - SecShdr->sh_addr)),\r
1612 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1613 break;\r
1614\r
1615 case R_RISCV_BRANCH:\r
1616 CoffAddFixup(\r
1617 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1618 + (Rel->r_offset - SecShdr->sh_addr)),\r
1619 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1620 break;\r
1621\r
1622 case R_RISCV_JAL:\r
1623 CoffAddFixup(\r
1624 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]\r
1625 + (Rel->r_offset - SecShdr->sh_addr)),\r
1626 EFI_IMAGE_REL_BASED_ABSOLUTE);\r
1627 break;\r
1628\r
1629 case R_RISCV_GPREL_I:\r
1630 case R_RISCV_GPREL_S:\r
1631 case R_RISCV_CALL:\r
abfff7c4 1632 case R_RISCV_CALL_PLT:\r
ad1db975
AC
1633 case R_RISCV_RVC_BRANCH:\r
1634 case R_RISCV_RVC_JUMP:\r
1635 case R_RISCV_RELAX:\r
1636 case R_RISCV_SUB6:\r
1637 case R_RISCV_SET6:\r
1638 case R_RISCV_SET8:\r
1639 case R_RISCV_SET16:\r
1640 case R_RISCV_SET32:\r
1641 case R_RISCV_PCREL_HI20:\r
abfff7c4 1642 case R_RISCV_GOT_HI20:\r
ad1db975 1643 case R_RISCV_PCREL_LO12_I:\r
c32c5911 1644 case R_RISCV_PCREL_LO12_S:\r
ad1db975
AC
1645 break;\r
1646\r
1647 default:\r
1648 Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));\r
1649 }\r
f51461c8
LG
1650 } else {\r
1651 Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);\r
1652 }\r
1653 }\r
ecbaa856
Z
1654 if (mEhdr->e_machine == EM_X86_64 && RelShdr->sh_info == mGOTShindex) {\r
1655 //\r
1656 // Tack relocations for GOT entries after other relocations for\r
1657 // the section the GOT is in, as it's usually found at the end\r
1658 // of the section. This is done in order to maintain Rva order\r
1659 // of Coff relocations.\r
1660 //\r
1661 EmitGOTRelocations();\r
1662 }\r
f51461c8
LG
1663 }\r
1664 }\r
1665 }\r
1666\r
ecbaa856
Z
1667 if (mEhdr->e_machine == EM_X86_64) {\r
1668 //\r
1669 // This is a safety net just in case the GOT is in a section\r
1670 // with no other relocations and the first invocation of\r
1671 // EmitGOTRelocations() above was skipped. This invocation\r
1672 // does not maintain Rva order of Coff relocations.\r
1673 // At present, with a single text section, all references to\r
1674 // the GOT and the GOT itself reside in section .text, so\r
1675 // if there's a GOT at all, the first invocation above\r
1676 // is executed.\r
1677 //\r
1678 EmitGOTRelocations();\r
1679 }\r
f51461c8
LG
1680 //\r
1681 // Pad by adding empty entries.\r
1682 //\r
1683 while (mCoffOffset & (mCoffAlignment - 1)) {\r
1684 CoffAddFixupEntry(0);\r
1685 }\r
1686\r
1687 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);\r
1688 Dir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];\r
1689 Dir->Size = mCoffOffset - mRelocOffset;\r
1690 if (Dir->Size == 0) {\r
1691 // If no relocations, null out the directory entry and don't add the .reloc section\r
1692 Dir->VirtualAddress = 0;\r
1693 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;\r
1694 } else {\r
1695 Dir->VirtualAddress = mRelocOffset;\r
1696 CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,\r
1697 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA\r
1698 | EFI_IMAGE_SCN_MEM_DISCARDABLE\r
1699 | EFI_IMAGE_SCN_MEM_READ);\r
1700 }\r
1701}\r
1702\r
1703STATIC\r
1704VOID\r
1705WriteDebug64 (\r
1706 VOID\r
1707 )\r
1708{\r
1709 UINT32 Len;\r
f51461c8
LG
1710 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;\r
1711 EFI_IMAGE_DATA_DIRECTORY *DataDir;\r
1712 EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *Dir;\r
1713 EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY *Nb10;\r
1714\r
1715 Len = strlen(mInImageName) + 1;\r
f51461c8 1716\r
0192b71c 1717 Dir = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(mCoffFile + mDebugOffset);\r
f51461c8
LG
1718 Dir->Type = EFI_IMAGE_DEBUG_TYPE_CODEVIEW;\r
1719 Dir->SizeOfData = sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) + Len;\r
0192b71c
AB
1720 Dir->RVA = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);\r
1721 Dir->FileOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);\r
f51461c8
LG
1722\r
1723 Nb10 = (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY*)(Dir + 1);\r
1724 Nb10->Signature = CODEVIEW_SIGNATURE_NB10;\r
1725 strcpy ((char *)(Nb10 + 1), mInImageName);\r
1726\r
1727\r
1728 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);\r
1729 DataDir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG];\r
0192b71c 1730 DataDir->VirtualAddress = mDebugOffset;\r
60e85a39 1731 DataDir->Size = sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);\r
f51461c8
LG
1732}\r
1733\r
1734STATIC\r
1735VOID\r
1736SetImageSize64 (\r
1737 VOID\r
1738 )\r
1739{\r
1740 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;\r
1741\r
1742 //\r
1743 // Set image size\r
1744 //\r
1745 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);\r
1746 NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = mCoffOffset;\r
1747}\r
1748\r
1749STATIC\r
1750VOID\r
1751CleanUp64 (\r
1752 VOID\r
1753 )\r
1754{\r
1755 if (mCoffSectionsOffset != NULL) {\r
1756 free (mCoffSectionsOffset);\r
1757 }\r
1758}\r
1759\r
1760\r