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30fdf114 LG |
1 | /** @file\r |
2 | ACPI 1.0b definitions from the ACPI Specification, revision 1.0b\r | |
3 | \r | |
97fa0ee9 | 4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
30fdf114 LG |
5 | \r |
6 | This program and the accompanying materials are licensed and made available\r | |
7 | under the terms and conditions of the BSD License which accompanies this\r | |
97fa0ee9 | 8 | distribution. The full text of the license may be found at\r |
30fdf114 LG |
9 | http://opensource.org/licenses/bsd-license.php\r |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
30fdf114 LG |
14 | **/\r |
15 | \r | |
16 | #ifndef _ACPI_1_0_H_\r | |
17 | #define _ACPI_1_0_H_\r | |
18 | \r | |
19 | #include "IndustryStandard/Acpi.h"\r | |
20 | \r | |
21 | //\r | |
22 | // Ensure proper structure formats\r | |
23 | //\r | |
24 | #pragma pack(1)\r | |
25 | //\r | |
26 | // ACPI 1.0b table structures\r | |
27 | //\r | |
28 | //\r | |
29 | // Root System Description Pointer Structure\r | |
30 | //\r | |
31 | typedef struct {\r | |
32 | UINT64 Signature;\r | |
33 | UINT8 Checksum;\r | |
34 | UINT8 OemId[6];\r | |
35 | UINT8 Reserved;\r | |
36 | UINT32 RsdtAddress;\r | |
37 | } EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r | |
38 | \r | |
39 | //\r | |
40 | // Root System Description Table\r | |
41 | // No definition needed as it is a common description table header followed by a\r | |
42 | // variable number of UINT32 table pointers.\r | |
43 | //\r | |
44 | //\r | |
45 | // RSDT Revision (as defined in ACPI 1.0b spec.)\r | |
46 | //\r | |
47 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r | |
48 | \r | |
49 | //\r | |
50 | // Fixed ACPI Description Table Structure (FADT)\r | |
51 | //\r | |
52 | typedef struct {\r | |
53 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
54 | UINT32 FirmwareCtrl;\r | |
55 | UINT32 Dsdt;\r | |
56 | UINT8 IntModel;\r | |
57 | UINT8 Reserved1;\r | |
58 | UINT16 SciInt;\r | |
59 | UINT32 SmiCmd;\r | |
60 | UINT8 AcpiEnable;\r | |
61 | UINT8 AcpiDisable;\r | |
62 | UINT8 S4BiosReq;\r | |
63 | UINT8 Reserved2;\r | |
64 | UINT32 Pm1aEvtBlk;\r | |
65 | UINT32 Pm1bEvtBlk;\r | |
66 | UINT32 Pm1aCntBlk;\r | |
67 | UINT32 Pm1bCntBlk;\r | |
68 | UINT32 Pm2CntBlk;\r | |
69 | UINT32 PmTmrBlk;\r | |
70 | UINT32 Gpe0Blk;\r | |
71 | UINT32 Gpe1Blk;\r | |
72 | UINT8 Pm1EvtLen;\r | |
73 | UINT8 Pm1CntLen;\r | |
74 | UINT8 Pm2CntLen;\r | |
75 | UINT8 PmTmLen;\r | |
76 | UINT8 Gpe0BlkLen;\r | |
77 | UINT8 Gpe1BlkLen;\r | |
78 | UINT8 Gpe1Base;\r | |
79 | UINT8 Reserved3;\r | |
80 | UINT16 PLvl2Lat;\r | |
81 | UINT16 PLvl3Lat;\r | |
82 | UINT16 FlushSize;\r | |
83 | UINT16 FlushStride;\r | |
84 | UINT8 DutyOffset;\r | |
85 | UINT8 DutyWidth;\r | |
86 | UINT8 DayAlrm;\r | |
87 | UINT8 MonAlrm;\r | |
88 | UINT8 Century;\r | |
89 | UINT8 Reserved4;\r | |
90 | UINT8 Reserved5;\r | |
91 | UINT8 Reserved6;\r | |
92 | UINT32 Flags;\r | |
93 | } EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;\r | |
94 | \r | |
95 | //\r | |
96 | // FADT Version (as defined in ACPI 1.0b spec.)\r | |
97 | //\r | |
98 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01\r | |
99 | \r | |
100 | //\r | |
101 | // Fixed ACPI Description Table Fixed Feature Flags\r | |
102 | // All other bits are reserved and must be set to 0.\r | |
103 | //\r | |
104 | #define EFI_ACPI_1_0_WBINVD (1 << 0)\r | |
105 | #define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)\r | |
106 | #define EFI_ACPI_1_0_PROC_C1 (1 << 2)\r | |
107 | #define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)\r | |
108 | #define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)\r | |
109 | #define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)\r | |
110 | #define EFI_ACPI_1_0_FIX_RTC (1 << 6)\r | |
111 | #define EFI_ACPI_1_0_RTC_S4 (1 << 7)\r | |
112 | #define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)\r | |
113 | #define EFI_ACPI_1_0_DCK_CAP (1 << 9)\r | |
114 | \r | |
fd171542 | 115 | #define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x0\r |
30fdf114 LG |
116 | //\r |
117 | // Firmware ACPI Control Structure\r | |
118 | //\r | |
119 | typedef struct {\r | |
120 | UINT32 Signature;\r | |
121 | UINT32 Length;\r | |
122 | UINT32 HardwareSignature;\r | |
123 | UINT32 FirmwareWakingVector;\r | |
124 | UINT32 GlobalLock;\r | |
125 | UINT32 Flags;\r | |
126 | UINT8 Reserved[40];\r | |
127 | } EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r | |
128 | \r | |
129 | //\r | |
130 | // Firmware Control Structure Feature Flags\r | |
131 | // All other bits are reserved and must be set to 0.\r | |
132 | //\r | |
133 | #define EFI_ACPI_1_0_S4BIOS_F (1 << 0)\r | |
134 | \r | |
135 | //\r | |
136 | // Multiple APIC Description Table header definition. The rest of the table\r | |
137 | // must be defined in a platform specific manner.\r | |
138 | //\r | |
139 | typedef struct {\r | |
140 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
141 | UINT32 LocalApicAddress;\r | |
142 | UINT32 Flags;\r | |
143 | } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r | |
144 | \r | |
145 | //\r | |
146 | // MADT Revision (as defined in ACPI 1.0b spec.)\r | |
147 | //\r | |
148 | #define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r | |
149 | \r | |
150 | //\r | |
151 | // Multiple APIC Flags\r | |
152 | // All other bits are reserved and must be set to 0.\r | |
153 | //\r | |
154 | #define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)\r | |
155 | \r | |
156 | //\r | |
157 | // Multiple APIC Description Table APIC structure types\r | |
158 | // All other values between 0x09 an 0xFF are reserved and\r | |
159 | // will be ignored by OSPM.\r | |
160 | //\r | |
161 | #define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00\r | |
162 | #define EFI_ACPI_1_0_IO_APIC 0x01\r | |
163 | #define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r | |
164 | #define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r | |
165 | #define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04\r | |
166 | \r | |
167 | //\r | |
168 | // APIC Structure Definitions\r | |
169 | //\r | |
170 | //\r | |
171 | // Processor Local APIC Structure Definition\r | |
172 | //\r | |
173 | typedef struct {\r | |
174 | UINT8 Type;\r | |
175 | UINT8 Length;\r | |
176 | UINT8 AcpiProcessorId;\r | |
177 | UINT8 ApicId;\r | |
178 | UINT32 Flags;\r | |
179 | } EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r | |
180 | \r | |
181 | //\r | |
182 | // Local APIC Flags. All other bits are reserved and must be 0.\r | |
183 | //\r | |
184 | #define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)\r | |
185 | \r | |
186 | //\r | |
187 | // IO APIC Structure\r | |
188 | //\r | |
189 | typedef struct {\r | |
190 | UINT8 Type;\r | |
191 | UINT8 Length;\r | |
192 | UINT8 IoApicId;\r | |
193 | UINT8 Reserved;\r | |
194 | UINT32 IoApicAddress;\r | |
195 | UINT32 SystemVectorBase;\r | |
196 | } EFI_ACPI_1_0_IO_APIC_STRUCTURE;\r | |
197 | \r | |
198 | //\r | |
199 | // Interrupt Source Override Structure\r | |
200 | //\r | |
201 | typedef struct {\r | |
202 | UINT8 Type;\r | |
203 | UINT8 Length;\r | |
204 | UINT8 Bus;\r | |
205 | UINT8 Source;\r | |
206 | UINT32 GlobalSystemInterruptVector;\r | |
207 | UINT16 Flags;\r | |
208 | } EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r | |
209 | \r | |
210 | //\r | |
211 | // Non-Maskable Interrupt Source Structure\r | |
212 | //\r | |
213 | typedef struct {\r | |
214 | UINT8 Type;\r | |
215 | UINT8 Length;\r | |
216 | UINT16 Flags;\r | |
217 | UINT32 GlobalSystemInterruptVector;\r | |
218 | } EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r | |
219 | \r | |
220 | //\r | |
221 | // Local APIC NMI Structure\r | |
222 | //\r | |
223 | typedef struct {\r | |
224 | UINT8 Type;\r | |
225 | UINT8 Length;\r | |
226 | UINT8 AcpiProcessorId;\r | |
227 | UINT16 Flags;\r | |
228 | UINT8 LocalApicInti;\r | |
229 | } EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;\r | |
230 | \r | |
231 | //\r | |
232 | // Smart Battery Description Table (SBST)\r | |
233 | //\r | |
234 | typedef struct {\r | |
235 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
236 | UINT32 WarningEnergyLevel;\r | |
237 | UINT32 LowEnergyLevel;\r | |
238 | UINT32 CriticalEnergyLevel;\r | |
239 | } EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;\r | |
240 | \r | |
241 | //\r | |
242 | // Known table signatures\r | |
243 | //\r | |
244 | //\r | |
245 | // "RSD PTR " Root System Description Pointer\r | |
246 | //\r | |
247 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL\r | |
248 | \r | |
249 | //\r | |
250 | // "APIC" Multiple APIC Description Table\r | |
251 | //\r | |
252 | #define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041\r | |
253 | \r | |
254 | //\r | |
255 | // "DSDT" Differentiated System Description Table\r | |
256 | //\r | |
257 | #define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r | |
258 | \r | |
259 | //\r | |
260 | // "FACS" Firmware ACPI Control Structure\r | |
261 | //\r | |
262 | #define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r | |
263 | \r | |
264 | //\r | |
265 | // "FACP" Fixed ACPI Description Table\r | |
266 | //\r | |
267 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r | |
268 | \r | |
269 | //\r | |
270 | // "PSDT" Persistent System Description Table\r | |
271 | //\r | |
272 | #define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r | |
273 | \r | |
274 | //\r | |
275 | // "RSDT" Root System Description Table\r | |
276 | //\r | |
277 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r | |
278 | \r | |
279 | //\r | |
280 | // "SBST" Smart Battery Specification Table\r | |
281 | //\r | |
282 | #define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r | |
283 | \r | |
284 | //\r | |
285 | // "SSDT" Secondary System Description Table\r | |
286 | //\r | |
287 | #define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r | |
288 | \r | |
289 | #pragma pack()\r | |
290 | \r | |
291 | #endif\r |