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1 | /** @file\r |
| 2 | \r |
| 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
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4 | \r |
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
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6 | \r |
| 7 | **/\r |
| 8 | \r |
| 9 | #include <Library/IoLib.h>\r |
| 10 | #include <Library/DebugLib.h>\r |
| 11 | \r |
| 12 | #include <Omap3530/Omap3530.h>\r |
| 13 | \r |
| 14 | VOID\r |
| 15 | ClockInit (\r |
| 16 | VOID\r |
| 17 | )\r |
| 18 | {\r |
| 19 | //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.\r |
| 20 | \r |
| 21 | // Enable PLL5 and set to 120 MHz as a reference clock.\r |
| 22 | MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));\r |
| 23 | MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));\r |
| 24 | MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);\r |
| 25 | \r |
| 26 | // Turn on functional & interface clocks to the USBHOST power domain\r |
| 27 | MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE\r |
| 28 | | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);\r |
| 29 | MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);\r |
| 30 | \r |
| 31 | // Turn on functional & interface clocks to the USBTLL block.\r |
| 32 | MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);\r |
| 33 | MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);\r |
| 34 | \r |
| 35 | // Turn on functional & interface clocks to MMC1 and I2C1 modules.\r |
| 36 | MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE\r |
| 37 | | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);\r |
| 38 | MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE\r |
| 39 | | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);\r |
| 40 | \r |
| 41 | // Turn on functional & interface clocks to various Peripherals.\r |
| 42 | MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE\r |
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43 | | CM_FCLKEN_PER_EN_GPT4_ENABLE\r |
| 44 | | CM_FCLKEN_PER_EN_GPIO2_ENABLE\r |
| 45 | | CM_FCLKEN_PER_EN_GPIO3_ENABLE\r |
| 46 | | CM_FCLKEN_PER_EN_GPIO4_ENABLE\r |
| 47 | | CM_FCLKEN_PER_EN_GPIO5_ENABLE\r |
| 48 | | CM_FCLKEN_PER_EN_GPIO6_ENABLE);\r |
| 49 | MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE\r |
| 50 | | CM_ICLKEN_PER_EN_GPT3_ENABLE\r |
| 51 | | CM_ICLKEN_PER_EN_GPT4_ENABLE\r |
| 52 | | CM_ICLKEN_PER_EN_GPIO2_ENABLE\r |
| 53 | | CM_ICLKEN_PER_EN_GPIO3_ENABLE\r |
| 54 | | CM_ICLKEN_PER_EN_GPIO4_ENABLE\r |
| 55 | | CM_ICLKEN_PER_EN_GPIO5_ENABLE\r |
| 56 | | CM_ICLKEN_PER_EN_GPIO6_ENABLE);\r |
| 57 | \r |
| 58 | // Turn on functional & inteface clocks to various wakeup modules.\r |
| 59 | MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE\r |
| 60 | | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);\r |
| 61 | MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE\r |
| 62 | | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);\r |
| 63 | }\r |
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