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1//\r
2// Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
3//\r
a1594be9 4// SPDX-License-Identifier: BSD-2-Clause-Patent\r
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5//\r
6//\r
7\r
8#include <AutoGen.h>\r
9#include <Chipset/ArmV7.h>\r
10\r
11 INCLUDE AsmMacroIoLib.inc\r
12\r
13 IMPORT CEntryPoint\r
14 IMPORT ArmPlatformIsPrimaryCore\r
15 IMPORT ArmReadMpidr\r
16 IMPORT ArmPlatformPeiBootAction\r
17 IMPORT ArmPlatformStackSet\r
18 IMPORT mSystemMemoryEnd\r
19\r
20 EXPORT _ModuleEntryPoint\r
21\r
22 PRESERVE8\r
23 AREA PrePiCoreEntryPoint, CODE, READONLY\r
24\r
25StartupAddr DCD CEntryPoint\r
26\r
27_ModuleEntryPoint\r
28 // Do early platform specific actions\r
29 bl ArmPlatformPeiBootAction\r
30\r
31 // Get ID of this CPU in Multicore system\r
32 bl ArmReadMpidr\r
33 // Keep a copy of the MpId register value\r
34 mov r8, r0\r
35\r
36_SetSVCMode\r
37 // Enter SVC mode, Disable FIQ and IRQ\r
38 mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r
39 msr CPSR_c, r1\r
40\r
41// Check if we can install the stack at the top of the System Memory or if we need\r
42// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
43// at the top of the DRAM)\r
44_SystemMemoryEndInit\r
45 adrll r1, mSystemMemoryEnd\r
46 ldrd r2, r3, [r1]\r
47 teq r3, #0\r
48 moveq r1, r2\r
49 mvnne r1, #0\r
50\r
51_SetupStackPosition\r
52 // r1 = SystemMemoryTop\r
53\r
54 // Calculate Top of the Firmware Device\r
55 mov32 r2, FixedPcdGet32(PcdFdBaseAddress)\r
56 mov32 r3, FixedPcdGet32(PcdFdSize)\r
57 sub r3, r3, #1\r
58 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
59\r
60 // UEFI Memory Size (stacks are allocated in this region)\r
61 mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)\r
62\r
63 //\r
64 // Reserve the memory for the UEFI region (contain stacks on its top)\r
65 //\r
66\r
67 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
68 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
69 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
70 cmp r0, r4\r
71 bge _SetupStack\r
72\r
73 // Case the top of stacks is the FdBaseAddress\r
74 mov r1, r2\r
75\r
76_SetupStack\r
77 // r1 contains the top of the stack (and the UEFI Memory)\r
78\r
79 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
80 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
81 // top of the memory space)\r
82 adds r9, r1, #1\r
83 bcs _SetupOverflowStack\r
84\r
85_SetupAlignedStack\r
86 mov r1, r9\r
87 b _GetBaseUefiMemory\r
88\r
89_SetupOverflowStack\r
90 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
91 // aligned (4KB)\r
92 mov32 r9, EFI_PAGE_MASK\r
93 and r9, r9, r1\r
94 sub r1, r1, r9\r
95\r
96_GetBaseUefiMemory\r
97 // Calculate the Base of the UEFI Memory\r
98 sub r9, r1, r4\r
99\r
100_GetStackBase\r
101 // r1 = The top of the Mpcore Stacks\r
102 // Stack for the primary core = PrimaryCoreStack\r
103 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
104 sub r10, r1, r2\r
105\r
106 // Stack for the secondary core = Number of Cores - 1\r
107 mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
108 sub r10, r10, r1\r
109\r
110 // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
111 mov r0, r10\r
112 mov r1, r8\r
113 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
114 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
115 mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
116 bl ArmPlatformStackSet\r
117\r
118 // Is it the Primary Core ?\r
119 mov r0, r8\r
120 bl ArmPlatformIsPrimaryCore\r
121 cmp r0, #1\r
122 bne _PrepareArguments\r
123\r
124_PrepareArguments\r
125 mov r0, r8\r
126 mov r1, r9\r
127 mov r2, r10\r
128\r
129 // Move sec startup address into a data register\r
130 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
131 ldr r4, StartupAddr\r
132\r
133 // Jump to PrePiCore C code\r
134 // r0 = MpId\r
135 // r1 = UefiMemoryBase\r
136 // r2 = StacksBase\r
137 blx r4\r
138\r
139_NeverReturn\r
140 b _NeverReturn\r
141\r
142 END\r